| commit | bc5a3ec6df66d2456667ddf1d6dfaf623552169d | [log] [tgz] |
|---|---|---|
| author | Duane Sand <duane.sand@imgtec.com> | Thu Jul 10 15:24:27 2014 -0700 |
| committer | Duane Sand <duane.sand@imgtec.com> | Wed Jul 23 14:00:21 2014 -0700 |
| tree | 2f51584e75c74e72638ed319fa198bcd717a2075 | |
| parent | 4d421901e587fd1563da94baf59b015017c01b91 [diff] |
[MIPSR6] Use C-coded string ops on mips32r6/mips64r6 The existing assembler code uses deprecated lwl/lwr/swl/swr ops. Replacing those with misalignment-forgiving lw/sw ops may involve careful performance tuning. Change-Id: I47a042f7b22b87d7d52e46c29c44b1db1ba8b693