tree deca8ead06908ee36d03925f393d6fc518d1890d
parent ee05cadf697e3ea89250ae5a6f0dd2f6d4b8adeb
author Roman Lebedev <lebedev.ri@gmail.com> 1524515929 +0000
committer Roman Lebedev <lebedev.ri@gmail.com> 1524515929 +0000

[DAGCombiner] Unfold scalar masked merge if profitable

Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].

[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated  (see `@in`).
So we need to make sure that they are still generated.

If the mask is constant, we do nothing. InstCombine should have unfolded it.
Else, i use `hasAndNot()` TLI hook.

For now, only handle scalars.

https://rise4fun.com/Alive/bO6

----

I *really* don't like the code i wrote in `DAGCombiner::unfoldMaskedMerge()`.
It is super fragile. Is there something like IR Pattern Matchers for this?

Reviewers: spatel, craig.topper, RKSimon, javed.absar

Reviewed By: spatel

Subscribers: andreadb, courbet, kristof.beyls, javed.absar, rengolin, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D45733

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330646 91177308-0d34-0410-b5e6-96231b3b80d8