| commit | 11510934d7f4b8cd6451468422d0e385a5424a57 | [log] [tgz] |
|---|---|---|
| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | Thu Oct 04 10:36:49 2018 +0000 |
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | Thu Oct 04 10:36:49 2018 +0000 |
| tree | fa797282bd1507841aa3cac8acfaa00ee718c09e | |
| parent | edb8892da34c93a290848cc73cd928952d96cab2 [diff] |
[llvm-mca] Check for inconsistencies when constructing instruction descriptors. This should help with catching inconsistent definitions of instructions with zero opcodes, which also declare to consume scheduler/pipeline resources. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343766 91177308-0d34-0410-b5e6-96231b3b80d8