| commit | f9568d8700d5389799796262cde313bb5c7d588a | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Mon Apr 17 21:48:13 2006 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Mon Apr 17 21:48:13 2006 +0000 |
| tree | d63e7f6f0a37b1b9f3b4018962565a11fc1536ca | |
| parent | d5c654bb0a179cd50c579f29cf10f37eb101cd06 [diff] |
Don't diddle VRSAVE if no registers need to be added/removed from it. This
allows us to codegen functions as:
_test_rol:
vspltisw v2, -12
vrlw v2, v2, v2
blr
instead of:
_test_rol:
mfvrsave r2, 256
mr r3, r2
mtvrsave r3
vspltisw v2, -12
vrlw v2, v2, v2
mtvrsave r2
blr
Testcase here: CodeGen/PowerPC/vec_vrsave.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27777 91177308-0d34-0410-b5e6-96231b3b80d8