| commit | 2220408e1a357b127aa915bff67ba7350cafd5c0 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Sun Nov 02 23:46:51 2014 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Sun Nov 02 23:46:51 2014 +0000 |
| tree | 0f5346935a0447b50905208087399452b7d69726 | |
| parent | 1ac6c458c85d76a05638761eaf401a2340e71f12 [diff] |
Support REG_SEQUENCE in tablegen. The problem is mostly that variadic output instruction aren't handled, so it is rejected for having an inconsistent number of operands, and then the right number of operands isn't emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221117 91177308-0d34-0410-b5e6-96231b3b80d8