| commit | 3cef9810b2ae6dd91c1cf211b47c8d838783196f | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Sun Sep 03 17:52:25 2017 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Sun Sep 03 17:52:25 2017 +0000 |
| tree | f99c39c862e6e527a9af38245a720213d6c3db5e | |
| parent | 849412352b3a21604404ca27f60a6e059b05ad86 [diff] |
[X86] Add patterns to turn an insert into lower subvector of a zero vector into a move instruction which will implicitly zero the upper elements. Ideally we'd be able to emit the SUBREG_TO_REG without the explicit register->register move, but we'd need to be sure the producing operation would select something that guaranteed the upper bits were already zeroed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312450 91177308-0d34-0410-b5e6-96231b3b80d8