| commit | 298455f3770d09ba3dcb690aaae0bb4a1c050415 | [log] [tgz] |
|---|---|---|
| author | Weiming Zhao <weimingz@codeaurora.org> | Thu Nov 03 21:49:08 2016 +0000 |
| committer | Weiming Zhao <weimingz@codeaurora.org> | Thu Nov 03 21:49:08 2016 +0000 |
| tree | 9ff20a76d58d0547d57c9bd1c1d46e303ffd81e7 | |
| parent | 00b62fb861abbe47854cb9257b31455f4b2286ab [diff] |
[Cortex-M0] Atomic lowering Summary: ARMv6m supports dmb etc fench instructions but not ldrex/strex etc. So for some atomic load/store, LLVM should inline instructions instead of lowering to __sync_ calls. Reviewers: rengolin, efriedma, t.p.northover, jmolloy Subscribers: efriedma, aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D26120 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285969 91177308-0d34-0410-b5e6-96231b3b80d8