| commit | b9d99ce19e456aaa9353b623568c49ded6c6e418 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Tue Jul 31 19:17:47 2018 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Tue Jul 31 19:17:47 2018 +0000 |
| tree | 0ea0c6bcc34a0381a02240884c87acaa692bb1bd | |
| parent | a7336f29220616427920dabdd5535a6abebcb3ba [diff] |
AMDGPU: Split wide vectors of i16/f16 into 32-bit regs on calls This improves code for the same reasons as scalarizing 32-bit element vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338418 91177308-0d34-0410-b5e6-96231b3b80d8