| commit | a328146a758bf6d3f25429113bfee0a6575be284 | [log] [tgz] |
|---|---|---|
| author | Tim Northover <tnorthover@apple.com> | Thu Feb 23 22:35:00 2017 +0000 |
| committer | Tim Northover <tnorthover@apple.com> | Thu Feb 23 22:35:00 2017 +0000 |
| tree | 77b06fb925846218d545d35e4de73253e9b834bf | |
| parent | b20570e64734b73fce02d5e4fd3a400c6015d7da [diff] |
ARM: make sure FastISel bails on f64 operations for Cortex-M4. FastISel wasn't checking the isFPOnlySP subtarget feature before emitting double-precision operations, so it got completely invalid CodeGen for doubles on Cortex-M4F. The normal ISel testing wasn't spectacular either so I added a second RUN line to improve that while I was in the area. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296031 91177308-0d34-0410-b5e6-96231b3b80d8