| commit | 851b4035374654cabf34f3ac3df1c8dd08c523e6 | [log] [tgz] |
|---|---|---|
| author | Volodymyr Turanskyy <volodymyr.turanskyy@arm.com> | Wed Jul 04 16:11:15 2018 +0000 |
| committer | Volodymyr Turanskyy <volodymyr.turanskyy@arm.com> | Wed Jul 04 16:11:15 2018 +0000 |
| tree | 25bd17b66041eba8e4fc35d2e797fe4326a2085b | |
| parent | 195a60c5f5f66fc68b155b35ba9e3b1feb757c6b [diff] |
[ARM] [Assembler] Support negative immediates: cover few missing cases Support for negative immediates was implemented in https://reviews.llvm.org/rL298380, however few instruction options were missing. This change adds negative immediates support and respective tests for the following: ADD ADDS ADDS.W AND.W ANDS BIC.W BICS BICS.W SUB SUBS SUBS.W Differential Revision: https://reviews.llvm.org/D48649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336286 91177308-0d34-0410-b5e6-96231b3b80d8