| commit | 37d12daa3a8046362cb044d878b65c4b3d39d9ae | [log] [tgz] |
|---|---|---|
| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | Tue Sep 01 16:23:45 2015 +0000 |
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | Tue Sep 01 16:23:45 2015 +0000 |
| tree | 258ec787665b44be4a771401ad3ad7aa4a64ed38 | |
| parent | 919f1f47e4211b21877d74b0543ec53bf4a165c1 [diff] |
[AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0. This matches the ARM behavior. In both cases, the register is part of the optional Performance Monitors extension, so, add the feature, and enable it for the A-class processors we support. Differential Revision: http://reviews.llvm.org/D12425 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246555 91177308-0d34-0410-b5e6-96231b3b80d8