| commit | 5eba494772fb9f74e8f7209de554da5bb2f75fa8 | [log] [tgz] |
|---|---|---|
| author | Sam Parker <sam.parker@arm.com> | Wed Dec 20 08:56:41 2017 +0000 |
| committer | Sam Parker <sam.parker@arm.com> | Wed Dec 20 08:56:41 2017 +0000 |
| tree | b1c942d2791a22a88ef7bce8cd9d2918544d9ac9 | |
| parent | 5942b047a5bee2c8934e6f1c22469cc883f8ebac [diff] |
[AArch64] CCSIDR2 system register Implement the 'Current Cache Size' register that has been introduced as part of the Armv8.3 architecture. I originally missed this, and (hopefully) should be the final patch for assembler support. Differential Revision: https://reviews.llvm.org/D41396 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321155 91177308-0d34-0410-b5e6-96231b3b80d8