| commit | d62e7ad88258f3f90e3bcc60ca282c1f4b52e207 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Fri Jun 01 05:12:44 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Fri Jun 01 05:12:44 2018 +0000 |
| tree | a371488afc64108c6b8eeb2210aeef71d5b6af76 | |
| parent | 3ff438cbeb524ecec6442e779267ea6d5beb3623 [diff] |
[X86][Disassembler] Clamp index to 4-bits when decoding GPR registers. A 5-bit value can occur when EVEX.X is 0 due to it being used to extend modrm.rm to encode XMM16-31. But if modrm.rm instead encodes a GPR, the Intel documentation says EVEX.X should be ignored so just mask it to 4 bits once we know its a GPR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333725 91177308-0d34-0410-b5e6-96231b3b80d8