| commit | 01e2215a94ac1db09c970a0ae09ff2790b72c981 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Jul 31 01:12:10 2015 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Jul 31 01:12:10 2015 +0000 |
| tree | f9deb4ed9ac0bcdde9eb37b9d9e413c6f1d6338f | |
| parent | 6a224c30a5d358305e6cfda1a62a78f658baa943 [diff] |
AMDGPU/SI: Set DwarfRegNum This requires a fix in tablegen for the cast<int> from bits<16> to work in the list initializer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243723 91177308-0d34-0410-b5e6-96231b3b80d8