| commit | 183b21b1f2038e27245c4bba7c5c30c1d1bc4cda | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Fri Sep 07 20:56:03 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Fri Sep 07 20:56:03 2018 +0000 |
| tree | d65b0402ed5f3375253ca5bf6264d90cfff4780c | |
| parent | 7df3d728242ea0c0c588183fc301e6a589ad8708 [diff] |
[X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for v1iX vectors. The generic type legalizer will scalarize vXi1 instructions getting rid of the vector entirely. Creating wider vector instructions is just going to prevent that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341705 91177308-0d34-0410-b5e6-96231b3b80d8