10c6c76ce2dedf44167a3373e52edbb7be7ed356 - platform_external_llvm

commit	10c6c76ce2dedf44167a3373e52edbb7be7ed356	[log] [tgz]
author	Matthias Braun <matze@braunis.de>	Fri Jan 19 06:08:15 2018 +0000
committer	Matthias Braun <matze@braunis.de>	Fri Jan 19 06:08:15 2018 +0000
tree	e7ebfbc67aa615b216896c578e2f1068db14289a
parent	3d7e4a4b98b40fed78b07f6c6911d99e09800ff7 [diff]

Move tests to the correct place

test/CodeGen/MIR is for testing the MIR parser/printer. Tests for passes
and targets belong to test/CodeGen/TARGETNAME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322925 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/AArch64/spill-fold.mir[Renamed from test/CodeGen/MIR/AArch64/spill-fold.mir - diff]
test/CodeGen/AMDGPU/fold-imm-f16-f32.mir[Renamed from test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir - diff]
test/CodeGen/AMDGPU/fold-multiple.mir[Renamed from test/CodeGen/MIR/AMDGPU/fold-multiple.mir - diff]
test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir[Renamed from test/CodeGen/MIR/AMDGPU/memory-legalizer-atomic-insert-end.mir - diff]
test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir[Renamed from test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir - diff]
test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir[Renamed from test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir - diff]
test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir[Renamed from test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir - diff]
test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir[Renamed from test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir - diff]
test/CodeGen/ARM/ifcvt_canFallThroughTo.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir - diff]
test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir - diff]
test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir - diff]
test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir - diff]
test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir - diff]
test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir[Renamed from test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir - diff]
test/CodeGen/X86/dynamic-regmask.ll[Renamed from test/CodeGen/MIR/X86/dynamic-regmask.ll - diff]
test/CodeGen/X86/opt_phis.mir[Renamed from test/CodeGen/MIR/X86/opt_phis.mir - diff]
test/CodeGen/X86/shrink_wrap_dbg_value.mir[Renamed from test/CodeGen/MIR/X86/shrink_wrap_dbg_value.mir - diff]
test/CodeGen/X86/simple-register-allocation-read-undef.mir[Renamed from test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir - diff]
test/CodeGen/X86/unreachable-mbb-undef-phi.mir[Renamed from test/CodeGen/MIR/X86/unreachable-mbb-undef-phi.mir - diff]

19 files changed

tree: e7ebfbc67aa615b216896c578e2f1068db14289a