[Hexagon] Fixes/changes to instruction selection

- Add patterns for rr/abs addressing modes.
- Set addrMode to PostInc where necessary.
- Misc fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275574 91177308-0d34-0410-b5e6-96231b3b80d8
2 files changed