commit | fc164bf317d388be2352e53530ef6ffe27e22ed0 | [log] [tgz] |
---|---|---|
author | Sanjay Patel <spatel@rotateright.com> | Thu Apr 14 20:17:40 2016 +0000 |
committer | Sanjay Patel <spatel@rotateright.com> | Thu Apr 14 20:17:40 2016 +0000 |
tree | 63ae098095d523557a07c6b234b7fa7c94e6c317 | |
parent | 755d4edc34ef6ba7d78280f99a356aa156dd9feb [diff] |
[InstCombine] remove constant by inverting compare + logic (PR27105) https://llvm.org/bugs/show_bug.cgi?id=27105 We can check if all bits outside of a constant mask are set with a single constant. As noted in the bug report, although this form should be considered the canonical IR, backends may want to transform this into an 'andn' / 'andc' comparison against zero because that could be a single machine instruction. Differential Revision: http://reviews.llvm.org/D18842 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266362 91177308-0d34-0410-b5e6-96231b3b80d8