commit | baad275225231448e69160dd56438caca4f2291b | [log] [tgz] |
---|---|---|
author | Simon Pilgrim <llvm-dev@redking.me.uk> | Tue Oct 25 20:56:42 2016 +0000 |
committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Tue Oct 25 20:56:42 2016 +0000 |
tree | 29084451d3f5a6874b940e9177c33002b9a4f6e5 | |
parent | 413fdf3b7f25bce26d8e585acafba53da8bc5f6a [diff] |
[DAGCombiner] Enable sdiv(x.y) -> udiv(x,y) combine for vectors SelectionDAG::SignBitIsZero (via SelectionDAG::computeKnownBits) has supported vectors since rL280927 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285118 91177308-0d34-0410-b5e6-96231b3b80d8