tree 940493777369e7111819415bf4d2ddb94079ce78
parent a16221181379b2fbce4115963de47ec5cb6d9686
author Craig Topper <craig.topper@intel.com> 1510189607 +0000
committer Craig Topper <craig.topper@intel.com> 1510189607 +0000

[X86] Make sure we don't read too many operands from X86ISD::FMADDS1/FMADDS3 nodes when doing FNEG combine.

r317453 added new ISD nodes without rounding modes that were added to an existing if/else chain. But all the previous nodes handled there included a rounding mode. The final code after this if/else chain expected an extra operand that isn't present for the new nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317748 91177308-0d34-0410-b5e6-96231b3b80d8