| commit | 94f848082d67e94103f11b628c276ae2e3dc4fe7 | [log] [tgz] |
|---|---|---|
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | Tue Dec 18 09:11:34 2018 +0000 |
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Tue Dec 18 09:11:34 2018 +0000 |
| tree | d8bb079ec2719dd89fb6be36ff0c1122695c74a3 | |
| parent | ce5a6119833914748df042b0880f0d609ad0b3be [diff] |
[X86][SSE] Move VSRAI sign extend in reg fold into SimplifyDemandedBits (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1 This works better as part of SimplifyDemandedBits than part of the general combine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349462 91177308-0d34-0410-b5e6-96231b3b80d8