| commit | 53c157a2904163797c88e5a237c74acddc6898e0 | [log] [tgz] |
|---|---|---|
| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | Fri Aug 31 08:30:47 2018 +0000 |
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | Fri Aug 31 08:30:47 2018 +0000 |
| tree | c6b7c30b62177e621a7a03d07c3ff5d9dbe9d748 | |
| parent | 6557447c4250bb9ef6b402eeb957840493f15d83 [diff] |
[X86][BtVer2] Fix WriteFShuffle256 schedule write info. This patch fixes the number of micro opcodes, and processor resource cycles for the following AVX instructions: vinsertf128rr/rm vperm2f128rr/rm vbroadcastf128 Tests have been regenerated using the usual scripts in the llvm/utils directory. Differential Revision: https://reviews.llvm.org/D51492 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341185 91177308-0d34-0410-b5e6-96231b3b80d8