commit 2ca8e676279e667a696d491ed9e8239b4b9ae961
author Sander de Smalen <sander.desmalen@arm.com> Mon Aug 20 09:16:59 2018 +0000
committer Sander de Smalen <sander.desmalen@arm.com> Mon Aug 20 09:16:59 2018 +0000
tree c2de75f795474c619ce7ec0f258a3f685fbdde12
parent ade2e57434df97de663a83ccad84f40db5b4f663

[AArch64][SVE] Asm: Add SVE System registers

This patch adds system registers for controlling aspects of SVE:
- ZCR_EL1  (r/w)   visible at EL1 and EL0.
- ZCR_EL2  (r/w)   visible at EL2 and Non-secure EL1 and EL0.
- ZCR_EL3  (r/w)   visible at all exception levels.

and a system register identifying SVE:
- ID_AA64ZFR0_EL1  (r)  SVE Feature identifier.

Reviewers: SjoerdMeijer, samparker, pbarrio, fhahn, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D50885


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340158 91177308-0d34-0410-b5e6-96231b3b80d8