[X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets

Correct splitting of v16i16 vectors into v8i16 vectors to prevent scalarization

Differential Revision: http://reviews.llvm.org/D18307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264512 91177308-0d34-0410-b5e6-96231b3b80d8
3 files changed