commit | 4a3c57b63a85a1b3db4c141ea6d6edf13830f017 | [log] [tgz] |
---|---|---|
author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | Thu Jun 08 20:56:36 2017 +0000 |
committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | Thu Jun 08 20:56:36 2017 +0000 |
tree | 9d462f934dbce3662a8a5862ee78c19ae14ed03d | |
parent | 8efab37a20de7f0c3d94689efbda825ef35b11a5 [diff] |
[Hexagon] Skip mux generation when predicate register is undefined git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305014 91177308-0d34-0410-b5e6-96231b3b80d8