- 13b063f AMDGPU: Remove ability to reserve VGPRs for debugger by Konstantin Zhuravlyov · 7 years ago
- 845b439 [mingw] Fix GCC ABI compatibility for comdat things by Reid Kleckner · 7 years ago
- d7f1ecf [InstCombine] fold vector select of binops with constant ops to 1 binop (PR37806) by Sanjay Patel · 7 years ago
- 43cbf8d [AMDGPU] Update assembler for HSA Code Object v3 by Scott Linder · 7 years ago
- 5119d14 Revert r335206 "Recommit r333268: [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions." by Francis Visoiu Mistrih · 7 years ago
- 8070954 [mips] Modify comment to test new email address (NFC). by Simon Dardis · 7 years ago
- cbeaa8b [AMDGPU] Fix bug with tracking processed blocks in SIInsertWaitcnts by Scott Linder · 7 years ago
- 3316883 AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z by Konstantin Zhuravlyov · 7 years ago
- e9f0bb4 [InstCombine] add tests for shuffled cmps; NFC by Sanjay Patel · 7 years ago
- 50feec5 [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink by Matt Davis · 7 years ago
- 83601e5 [InstCombine] use constant pattern matchers with icmp+sext by Sanjay Patel · 7 years ago
- 7cf22ab [InstCombine] add vector icmp tests with undefs; NFC by Sanjay Patel · 7 years ago
- 1a4304a [InstCombine] simplify binops before trying other folds by Sanjay Patel · 7 years ago
- baa9cce [LoopVectorize] regenerate full checks; NFC by Sanjay Patel · 7 years ago
- 2c7b128 [X86] Update fast-isel tests for clang r335253. by Craig Topper · 7 years ago
- 22a1ef1 [DWARF] Warn on and ignore ".file 0" for DWARF v4 and earlier. by Paul Robinson · 7 years ago
- 3080dcb Revert "[AArch64] Coalesce Copy Zero during instruction selection" by Sirish Pande · 7 years ago
- 8f072ac DAG combine "and|or (select c, -1, 0), x" -> "select c, x, 0|-1" by Stanislav Mekhanoshin · 7 years ago
- 3cd5aad [ARM] Enable useAA() for the in-order Cortex-R52 by David Green · 7 years ago
- e434528 [InstCombine] make div/rem vector constant utility function; NFCI by Sanjay Patel · 7 years ago
- a3ff01d [NFC][ARM] ldrd/strd negative tests by Sam Parker · 7 years ago
- 34d9682 [llvm-exegesis][NFC] Simplify BenchmarkRunner. by Clement Courbet · 7 years ago
- 0160543 [RISCV] Tail calls don't need to save return address by Sameer AbuAsal · 7 years ago
- 660c8bd [x86] Lower some trunc + shuffle patterns to vpmov[q|d][b|w] by Mikhail Dvoretckii · 7 years ago
- 11ef9aa [llvm-exegesis][NFC] Simplify LLVMState. by Clement Courbet · 7 years ago
- 2165044 [CodeGen] Avoid handling DBG_VALUE in LiveRegUnits::stepBackward by Krzysztof Parzyszek · 7 years ago
- ec3300a AMDGPU: Remove redundant MIMG instruction variants by Nicolai Haehnle · 7 years ago
- 4c3fa87 AMDGPU: Remove old-style image intrinsics by Nicolai Haehnle · 7 years ago
- 7f7cea5 InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded by Nicolai Haehnle · 7 years ago
- 330c657 AMDGPU: Convert test cases to the dimension-aware intrinsics by Nicolai Haehnle · 7 years ago
- d42a61b AMDGPU: Select MIMG instructions manually in SITargetLowering by Nicolai Haehnle · 7 years ago
- f6113ec AMDGPU: Refactor MIMG instruction TableGen using generic tables by Nicolai Haehnle · 7 years ago
- db5003e AMDGPU: Use generic tables instead of SearchableTable by Nicolai Haehnle · 7 years ago
- 2b1cd51 TableGen/SearchableTables: Support more generic enums and tables by Nicolai Haehnle · 7 years ago
- f474189 AMDGPU: Pass AMDGPUSampleVariant to MIMG_{Sampler,Gather}(_WQM) by Nicolai Haehnle · 7 years ago
- 6694c8f AMDGPU: Add implicit def of SCC to kill and indirect pseudos by Nicolai Haehnle · 7 years ago
- 3bd8feb AMDGPU: Turn D16 for MIMG instructions into a regular operand by Nicolai Haehnle · 7 years ago
- 9f2ffce TableGen: Allow foreach in multiclass to depend on template args by Nicolai Haehnle · 7 years ago
- b36f931 [llvm-mca] Updates comment in code, and remove some stale comments. NFC by Andrea Di Biagio · 7 years ago
- 6f9eeb2 [DA] Enable -da-delinearize by default by David Green · 7 years ago
- 400b266 [X86][AVX] Reduce v4f64/v4i64 shuffle costs (PR37882) by Simon Pilgrim · 7 years ago
- c660be2 [SLPVectorizer][X86] Add horizontal add/sub tests by Simon Pilgrim · 7 years ago
- b16b4ba [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property by Mikael Holmen · 7 years ago
- b631beb CODE_OWNERS: Take ownership of the MIPS backend by Simon Atanasyan · 7 years ago
- 2e8cb93 [DAGCombine] Fix alignment for offset loads/stores by David Green · 7 years ago
- 242cb92 Remove FIXME comment about WIP. by Eric Christopher · 7 years ago
- 54da16e Add some explanatory text to the associated symbol support. by Eric Christopher · 7 years ago
- cb4031e Recommit r333268: [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions. by Florian Hahn · 7 years ago
- 57db017 [DebugInfo] Keep DBG_VALUE undef in LiveDebugVariables by Mikael Holmen · 7 years ago
- c076ce0 [X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR. by Craig Topper · 7 years ago
- b92fd73 [PM/LoopUnswitch] Add partial non-trivial unswitching for invariant by Chandler Carruth · 7 years ago
- 5acb50c [RISC-V] Fix a test case to not include label names as those aren't by Chandler Carruth · 7 years ago
- f7c66a1 ProvenanceAnalysis: Store WeakTrackingVH instead of Value* in UnderlyingValue Cache. by Michael Zolotukhin · 7 years ago
- cb5e58d [X86] Remove masking from 512-bit floating max/min intrinsics. Use select instruction instead. by Craig Topper · 7 years ago
- 956efee Revert "[SCEV] Improve zext(A /u B) and zext(A % B)" by Tim Shen · 7 years ago
- c7b8c8c [SCEV] Improve zext(A /u B) and zext(A % B) by Tim Shen · 7 years ago
- 5a4174c [DWARF] Improved error reporting for range lists. by Wolfgang Pieb · 7 years ago
- a5a4f60 [mips] Add microMIPS specific addressing patterns. by Simon Dardis · 7 years ago
- 8d9ac7f Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. by Alina Sbirlea · 7 years ago
- 6de04e4 Fix WasmEHFuncInfo.h to include what it uses by Bruno Cardoso Lopes · 7 years ago
- 673b97f [MemorySSA] Add convenience APIs in updater to avoid needing MSSA. by Alina Sbirlea · 7 years ago
- af5dcf1 Remove myself from the release testers list. (NFC) by Simon Dardis · 7 years ago
- b8b321a [Dominators] Simplify child lists and make them deterministic by Benjamin Kramer · 7 years ago
- af6c3e6 [MemorySSA] Verify Phi incoming blocks are block predecessors. by Alina Sbirlea · 7 years ago
- a127621 [X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel by Craig Topper · 7 years ago
- 346e379 [SLPVectorizer] Provide InstructionsState down the BoUpSLP vectorization call tree by Simon Pilgrim · 7 years ago
- 3e703da Allow binop C1, (select cc, CF, CT) -> select folding by Stanislav Mekhanoshin · 7 years ago
- 5534875 [InstCombine] fix typo in test comment; NFC by Sanjay Patel · 7 years ago
- 2bdc7ff [mips] Correct predicates for loads, bit manipulation instructions and some pseudos by Simon Dardis · 7 years ago
- eb6f9a1 AMDGPU: Fix scalar_to_vector for v4i16/v4f16 by Matt Arsenault · 7 years ago
- f5aaf72 AMDGPU: Fix missing C++ mode comment by Matt Arsenault · 7 years ago
- 40afa18 [Hexagon] Replace .ll test for expanding post-ra pesudos with .mir by Krzysztof Parzyszek · 7 years ago
- 882235c [IR] add/use isIntDivRem convenience function by Sanjay Patel · 7 years ago
- 224eb0a [PM/LoopUnswitch] Support partial trivial unswitching. by Chandler Carruth · 7 years ago
- c409a14 [RISCV] Accept fmv.s.x and fmv.x.s as mnemonic aliases for fmv.w.x and fmv.x.w by Alex Bradbury · 7 years ago
- e9f7c28 [MachineOutliner] Add debug info test for the outliner by Jessica Paquette · 7 years ago
- a8d6542 [Local] Generalize insertReplacementDbgValues, NFC by Vedant Kumar · 7 years ago
- d8be43c [InstCombine] add vector select of binops tests (PR37806) by Sanjay Patel · 7 years ago
- a65852c [PredicateInfo] Order instructions in different BBs by DFSNumIn. by Florian Hahn · 7 years ago
- 92dc883 [DWARF] Don't keep a ref to possibly stack allocated data. by Paul Robinson · 7 years ago
- 444617b IRMover: Account for matching types present across modules by Vlad Tsyrklevich · 7 years ago
- 1d36450 [Local] Add a utility to insert replacement dbg.values, NFC by Vedant Kumar · 7 years ago
- 19357ea Remove a redundant initialization. NFC by Paul Robinson · 7 years ago
- cb219d0 [SLPVectorizer] Move isOneOf after InstructionsState type. NFCI. by Simon Pilgrim · 7 years ago
- 105d2e8 [DAG] Don't map a TableId to itself in the ReplacedValues map by Bjorn Pettersson · 7 years ago
- c578b9b [DAG] Fix and-mask folding when narrowing loads. by Nirav Dave · 7 years ago
- 737553b [LIT] Enable testing of LLVM gold plugin on Mac OS X by Eugene Leviant · 7 years ago
- 9d9298b [WebAssembly] Update know failures for the wasm waterfall by Sam Clegg · 7 years ago
- cac51ca [SLPVectorizer] Use InstructionsState to record AltOpcode by Simon Pilgrim · 7 years ago
- 27bb5a7 [llvm-mca] use APint::operator[] to obtain the bit value. NFC by Andrea Di Biagio · 7 years ago
- 2970a29 [SLPVectorizer] Relax "alternate" opcode vectorisation to work with any SK_Select shuffle pattern by Simon Pilgrim · 7 years ago
- 0da7180 [InstSimplify] Fix missed optimization in simplifyUnsignedRangeCheck() by Sanjay Patel · 7 years ago
- f4f8a44 [InstSimplify] Add tests for missed optimizations in simplifyUnsignedRangeCheck (NFC) by Sanjay Patel · 7 years ago
- 9a06968 [RISCV] Add InstAlias definitions for fgt.{s|d}, fge.{s|d} by Alex Bradbury · 7 years ago
- 52d71b2 [X86] Adding a test for PR37879 by Mikhail Dvoretckii · 7 years ago
- 60b40e9 [ADT] Allow llvm::hash_code as DenseMap key. by Sam McCall · 7 years ago
- 1979d71 [Hexagon] Remove 'T' from HasVNN predicates, NFC by Krzysztof Parzyszek · 7 years ago
- bad6cbc [mips] Fix the predicates of some DSP instructions from AdditionalPredicates to ASEPredicate by Simon Dardis · 7 years ago
- a5181ab [InstCombine] ignore debuginfo when removing redundant assumes (PR37726) by Sanjay Patel · 7 years ago
- 1fcac9f [RISCV] Add InstAlias definitions for sgt and sgtu by Alex Bradbury · 7 years ago