1. 324b3fc [FastISel] Add basic infrastructure to support a target-independent call lowering hook in FastISel. WIP by Juergen Ributzka · 11 years ago
  2. af6721b When we sink an instruction, this can open up opportunity for the operands to be sunk - add them to the worklist by Aditya Nandakumar · 11 years ago
  3. 41a6ddb Move the API and implementation of clang::driver::getARMCPUForMArch() to llvm::Triple::getARMCPUForArch(). by Argyrios Kyrtzidis · 11 years ago
  4. 56b7de6 [FastISel] Make isInTailCallPosition independent of SelectionDAG. by Juergen Ributzka · 11 years ago
  5. 2f58a51 [FastISel] Breakout intrinsic lowering into a separate function and add a target-hook. by Juergen Ributzka · 11 years ago
  6. 7f50100 Add the "-s" flag to llvm-nm for Mach-O files that prints symbols only in by Kevin Enderby · 11 years ago
  7. 1736df6 Simplify the raw_svector_ostream tweak from r212816 by Alp Toker · 11 years ago
  8. c345ba8 [MC] Constify MCELF::GetVisibility and MCELF::getOther by Ulrich Weigand · 11 years ago
  9. edb2718 [PowerPC] Fix invalid displacement created by LocalStackAlloc by Ulrich Weigand · 11 years ago
  10. 438e1f2 R600/SI: Use i32 vectors for resources and samplers by Marek Olsak · 11 years ago
  11. 5a35fdc R600/SI: add sample and image intrinsics exposing all instruction fields by Marek Olsak · 11 years ago
  12. 4071d6f R600/SI: fix shadow mapping for 1D and 2D array textures by Marek Olsak · 11 years ago
  13. cc00568 Add a test case for r212596 by Timur Iskhodzhanov · 11 years ago
  14. 9d03442 llvm/test/BugPoint/compile-custom.ll: Use explicit %python to invoke a test script, compile-custom.ll.py, for shebang-incapable hosts. by NAKAMURA Takumi · 11 years ago
  15. ffbe320 llvm/test/lit.cfg: Let %python available. by NAKAMURA Takumi · 11 years ago
  16. c1a060c [CMake] add_llvm_library: Add "RUNTIME DESTINATION bin" to install(). It affects add_library(SHARED) for Win32.DLL. by NAKAMURA Takumi · 11 years ago
  17. 81bc6fb raw_svector_ostream: grow and reserve atomically by Alp Toker · 11 years ago
  18. cb047f2 ARM: Allow __fp16 as a function arg or return type for AArch64 by Oliver Stannard · 11 years ago
  19. c58b079 Add FileCheck -implicit-check-not option to allow stricter tests without adding too many CHECK-NOTs manually. by Alexander Kornienko · 11 years ago
  20. 52c50f5 [X86] Fix the inversion of low and high bits for the lowering of MUL_LOHI. by Quentin Colombet · 11 years ago
  21. ca4b180 Added test for commit r212802 that was missing by Marcello Maggioni · 11 years ago
  22. a533de6 Fixup PHIs in LowerSwitch when a Leaf node is not emitted. by Marcello Maggioni · 11 years ago
  23. 11c9a50 [X86] AVX512: Improve readability of isCDisp8 by Adam Nemet · 11 years ago
  24. fcc56eb [X86] AVX512: Simplify logic in isCDisp8 by Adam Nemet · 11 years ago
  25. 181826c Revert "Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself."" by David Blaikie · 11 years ago
  26. 9853f94 Partially fix PR20058: reduce compile time for loop unrolling with very high count by reducing calls to SE->forgetLoop by Mark Heffernan · 11 years ago
  27. eb2fff6 [RuntimeDyld] Replace a crufty old ARM RuntimeDyld test with a new one that uses by Lang Hames · 11 years ago
  28. 5cfcad1 [RuntimeDyld] Improve error diagnostic in RuntimeDyldChecker. by Lang Hames · 11 years ago
  29. e14048c Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself." by David Blaikie · 11 years ago
  30. 9fe4d6b This test case doesn't actually need the inliner to reproduce the input. by David Blaikie · 11 years ago
  31. 865527a R600: Implement float to long/ulong by Jan Vesely · 11 years ago
  32. bb917c2 SelectionDAG: Factor FP_TO_SINT lower code out of DAGLegalizer by Jan Vesely · 11 years ago
  33. e39f7f9 Use the integrated assembler by default on OpenBSD. by Brad Smith · 11 years ago
  34. fc6a659 [mips] Emit two CFI offset directives per double precision SDC1/LDC1 by Zoran Jovanovic · 11 years ago
  35. 4d3b613 Extend the test coverage in combine-vec-shuffle-2.ll adding some negative tests. by Andrea Di Biagio · 11 years ago
  36. b730c3d Revert "Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine."" by Matt Arsenault · 11 years ago
  37. 3996e52 [DAG] Further improve the logic in DAGCombiner that folds a pair of shuffles into a single shuffle if the resulting mask is legal. by Andrea Di Biagio · 11 years ago
  38. 60079c1 [X86] Mark pseudo instruction TEST8ri_NOEREX as hasSIdeEffects=0. by Akira Hatanaka · 11 years ago
  39. b5a006e Add the CSR company and the Kalimba DSP processor to Triple. by Eric Christopher · 11 years ago
  40. 282eda9 Make it possible for the Subtarget to change between function by Eric Christopher · 11 years ago
  41. 5b8419d InstCombine: Fix a crash in Descale for multiply-by-zero by Duncan P. N. Exon Smith · 11 years ago
  42. c1a6d65 IR: Aliases don't belong to an explicit comdat by David Majnemer · 11 years ago
  43. b1beb01 Feeding isSafeToSpeculativelyExecute its DataLayout pointer (in Sink) by Hal Finkel · 11 years ago
  44. 9478f0a Mips: Silence a -Wcovered-switch-default by David Majnemer · 11 years ago
  45. 0ef4711 [mips] Added FPXX modeless calling convention. by Zoran Jovanovic · 11 years ago
  46. a9af055 [AArch64] Add logical alias instructions to MC AsmParser by Arnaud A. de Grandmaison · 11 years ago
  47. 73118c4 Feeding isSafeToSpeculativelyExecute its DataLayout pointer by Hal Finkel · 11 years ago
  48. 6b0ac2a AArch64: correctly fast-isel i8 & i16 multiplies by Tim Northover · 11 years ago
  49. 24a071b [mips] Add support for -modd-spreg/-mno-odd-spreg by Daniel Sanders · 11 years ago
  50. a2bc403 [x32] Add AsmBackend for X32 which uses ELF32 with x86_64 (the author is Pavel Chupin). by Zinovy Nis · 11 years ago
  51. cdbdfa2 [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous by Chandler Carruth · 11 years ago
  52. 35dda8a [SystemZ] Use SystemZCallingConv.td to define callee-saved registers by Richard Sandiford · 11 years ago
  53. 2f7fa89 SpecialCaseList.h: Fix -Wdocumentation with \code. by NAKAMURA Takumi · 11 years ago
  54. e93de7f llvm/test/CodeGen/X86/shift-parts.ll: FileCheck-ize. (from r212640) by NAKAMURA Takumi · 11 years ago
  55. 5290734 Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine." by NAKAMURA Takumi · 11 years ago
  56. 446067b [SystemZ] Tweak instruction format classifications by Richard Sandiford · 11 years ago
  57. a4e7f05 [x86] Add another combine that is particularly useful for the new vector by Chandler Carruth · 11 years ago
  58. 9aa8beb [SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA by Richard Sandiford · 11 years ago
  59. beefa3a [SystemZ] Avoid using i8 constants for immediate fields by Richard Sandiford · 11 years ago
  60. b350ec7 [SystemZ] Fix FPR dwarf numbering by Richard Sandiford · 11 years ago
  61. b0b3161 Make it possible for ints/floats to return different values from getBooleanContents() by Daniel Sanders · 11 years ago
  62. 977aab5 [x86] Expand the target DAG combining for PSHUFD nodes to be able to by Chandler Carruth · 11 years ago
  63. dc90a3a [x86] Tweak the v16i8 single input special case lowering for shuffles by Chandler Carruth · 11 years ago
  64. 8892dbf A test case for not asserting in isDereferenceablePointer upon unsized types by Hal Finkel · 11 years ago
  65. 5ee0267 Fix isDereferenceablePointer not to try to take the size of an unsized type. by Hal Finkel · 11 years ago
  66. a739834 Allow isDereferenceablePointer to look through some bitcasts by Hal Finkel · 11 years ago
  67. 3445179 MC: modernise for loop by Saleem Abdulrasool · 11 years ago
  68. 09f505a MC: add and use an accessor for WinCFI by Saleem Abdulrasool · 11 years ago
  69. 141d3e3 Remove move assignment operator to appease older GCCs. by Peter Collingbourne · 11 years ago
  70. 95b14b0 [x86] Initial improvements to the new shuffle lowering for v16i8 by Chandler Carruth · 11 years ago
  71. ac37f73 Explicitly define move constructor and move assignment operator to appease MSVC. by Peter Collingbourne · 11 years ago
  72. 0f29cef SpecialCaseList: use std::unique_ptr. by Peter Collingbourne · 11 years ago
  73. a3c15c1 [AArch64]Fix an assertion failure in DAG Combiner about concating 2 build_vector. by Hao Liu · 11 years ago
  74. 425ef82 R600/SI: Add support for llvm.convert.{to|from}.fp16 by Matt Arsenault · 11 years ago
  75. 985d66c Fix types in documentation. by Matt Arsenault · 11 years ago
  76. c478879 [x86] Refactor some of the new code for lowering v16i8 shuffles to by Chandler Carruth · 11 years ago
  77. 706cbb3 [dfsan] Handle bitcast aliases. by Peter Collingbourne · 11 years ago
  78. 515f228 [SDAG] Make the new zext-vector-inreg node default to expand so targets by Chandler Carruth · 11 years ago
  79. eff0c67 Recommit r212203: Don't try to construct debug LexicalScopes hierarchy for functions that do not have top level debug information. by David Blaikie · 11 years ago
  80. 3e51f75 Decouple llvm::SpecialCaseList text representation and its LLVM IR semantics. by Alexey Samsonov · 11 years ago
  81. bdd9df4 Use simpler constructor for range adapter. by Tim Northover · 11 years ago
  82. 3e8ed89 Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine. by Matt Arsenault · 11 years ago
  83. a3edd6a AArch64: Better codegen for storing to __fp16. by Jim Grosbach · 11 years ago
  84. f634247 Change an assert() to a diagnostic. by Jim Grosbach · 11 years ago
  85. 08b75dd TargetRegisterInfo: Remove function that fell out of use years ago. by Benjamin Kramer · 11 years ago
  86. 9753da1 Update ReleaseNotes to mention Atomic NAND semantic changes. by Cameron McInally · 11 years ago
  87. 074b752 [X86] AVX512: Enable it in the Loop Vectorizer by Adam Nemet · 11 years ago
  88. 479af7c Make AArch64FastISel::EmitIntExt explicitly check its source and destination types by Louis Gerbarg · 11 years ago
  89. 90df187 removed duplicate testcase by Sanjay Patel · 11 years ago
  90. 296cb7b Fix for PR20059 (instcombine reorders shufflevector after instruction that may trap) by Sanjay Patel · 11 years ago
  91. 6a65566 Add Imagination Technologies to the vendors in llvm::Triple by Daniel Sanders · 11 years ago
  92. 7fba8d7 Generic: add range-adapter for option parsing. by Tim Northover · 11 years ago
  93. 4c27c85 [x86] Fix a bug in my new zext-vector-inreg DAG trickery where we were by Chandler Carruth · 11 years ago
  94. f4fcb0c Sink two variables only used in an assert into the assert itself. Should by Chandler Carruth · 11 years ago
  95. 4afbd3e X86: When lowering v8i32 himuls use the correct shuffle masks for AVX2. by Benjamin Kramer · 11 years ago
  96. ce184e9 [x86] Add a ZERO_EXTEND_VECTOR_INREG DAG node and use it when widening by Chandler Carruth · 11 years ago
  97. 1285b31 [mips][mips64r6] Correct select patterns that have the condition or true/false values backwards by Daniel Sanders · 11 years ago
  98. 3887046 [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions by Daniel Sanders · 11 years ago
  99. a2a8a72 [x86] Initialize a pointer to null to fix a bug in r212602. by Chandler Carruth · 11 years ago
  100. f08bcb9 [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not available on MIPS32r6/MIPS64r6) by Daniel Sanders · 11 years ago