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review.blissroms.org / platform_external_llvm / 7b59fc99d5676c68cb1ef122c5ec2f083b68f473
  1. 7b59fc9 Add a blank line for a test commit. by Sean Fertile · 9 years ago
  2. 17ff155 [ADT/MathExtras] Introduce PowerOf2Ceil. by Davide Italiano · 9 years ago
  3. 55616f6 [llvm] Remove duplicate header from PassInfo.h by Mandeep Singh Grang · 9 years ago
  4. 58da394 [opt-viewer] Add column number support by Adam Nemet · 9 years ago
  5. ee5205b ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() by Matthias Braun · 9 years ago
  6. 9295796 [opt-viewer] Display inlining context by Adam Nemet · 9 years ago
  7. 9781343 [opt-viewer] Add option to set source directory by Adam Nemet · 9 years ago
  8. 2cb2d87 [opt-viewer] Mention Pygments in the description by Adam Nemet · 9 years ago
  9. c2e5ee3 [opt-viewer] Add syntax highlighting by Adam Nemet · 9 years ago
  10. a0c045c Revert "[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies" by Stanislav Mekhanoshin · 9 years ago
  11. 0e71d50 Fix requirements. by Joerg Sonnenberger · 9 years ago
  12. 773603e ScheduleDAGInstrs: Ignore dependencies of constant physregs by Matthias Braun · 9 years ago
  13. a461137 Timer: Remove group-less NamedRegionTimer constructor. by Matthias Braun · 9 years ago
  14. 3f647d6 [DAG Combiner] Fix the native computation of the Newton series for reciprocals by Evandro Menezes · 9 years ago
  15. b020491 GlobalISel: fix mistaken comment change by Tim Northover · 9 years ago
  16. c5bdc92 [SelectionDAG] Add support for vector demandedelts in ADD/SUB opcodes by Simon Pilgrim · 9 years ago
  17. a145558 [LSR] Tweak loop-strength-reduce-crash test. Test-only change. by Justin Lebar · 9 years ago
  18. ca668e1 IR: Introduce inrange attribute on getelementptr indices. by Peter Collingbourne · 9 years ago
  19. d31cbc4 [X86] Updated knownbits vector ADD/SUB test by Simon Pilgrim · 9 years ago
  20. d3f442d [X86] Add knownbits vector ADD test by Simon Pilgrim · 9 years ago
  21. fc1b3b3 ScheduleDAGInstrs: Slightly simplify code; NFC by Matthias Braun · 9 years ago
  22. 7a98835 [SelectionDAG] Add support for splatted vectors in SUB opcode by Simon Pilgrim · 9 years ago
  23. d2d5b99 [X86] Add knownbits vector SUB test by Simon Pilgrim · 9 years ago
  24. 2821987 RegisterCoalescer: Ignore interferences for constant physregs by Matthias Braun · 9 years ago
  25. a2ee7d2 AMDGPU: Emit runtime metadata as a note element in .note section by Yaxun Liu · 9 years ago
  26. a6269f0 Fix type ambiguity with std::max by Zachary Turner · 9 years ago
  27. 67e7880 Fix initialization order error. by Zachary Turner · 9 years ago
  28. 48fbf5c [Support] Improve flexibility of binary blob formatter. by Zachary Turner · 9 years ago
  29. ab792ca [PDB] Begin adding documentation for the PDB file format. by Zachary Turner · 9 years ago
  30. e13ecb7 [opt-viewer] Avoid duplicated remarks by Adam Nemet · 9 years ago
  31. b7798f4 [Target] Rename X86/ARM Assembly printer to reflect reality. by Davide Italiano · 9 years ago
  32. 31593fa Fix some Clang-tidy modernize-use-default and readability-redundant-member-init and Include What You Use warnings; other minor fixes. by Eugene Zelenko · 9 years ago
  33. 2e53b71 Revert r286437 r286438, they caused PR30976 by Nico Weber · 9 years ago
  34. 9bf32e2 [OptDiag] Remove non-printable chars from function name by Adam Nemet · 9 years ago
  35. 9ae088b [SelectionDAG] Add support for vector demandedelts in TRUNCATE opcodes by Simon Pilgrim · 9 years ago
  36. fb6e3a8 Add comments about why we put LoopSink pass at the very late stage. by Dehao Chen · 9 years ago
  37. 68c9861 [X86] Add knownbits vector TRUNC test by Simon Pilgrim · 9 years ago
  38. 62e7077 Restore part of "[ThinLTO] Prevent exporting of locals used/defined in module level asm" by Teresa Johnson · 9 years ago
  39. a7d6813 Use common SDLoc. NFCI. by Simon Pilgrim · 9 years ago
  40. e84f684 [SelectionDAG] Add support for vector demandedelts in MUL opcodes by Simon Pilgrim · 9 years ago
  41. 1d957ff reproducer for pr29002 by Asaf Badouh · 9 years ago
  42. 0deee39 AMDGPU: Add VI i16 support by Tom Stellard · 9 years ago
  43. 3cc5ea9 [X86] Add knownbits vector MUL test by Simon Pilgrim · 9 years ago
  44. 2eb0b40 [SelectionDAG] Add support for vector demandedelts in SRA opcodes by Simon Pilgrim · 9 years ago
  45. 80dc268 [InstCombine] auto-generate better checks; NFC by Sanjay Patel · 9 years ago
  46. dbb1fda [X86] Add knownbits vector arithmetic shift test by Simon Pilgrim · 9 years ago
  47. 0c5b3f0 [DAGCombiner] Correctly extract the ConstOrConstSplat shift value for SHL nodes by Simon Pilgrim · 9 years ago
  48. 1f5dcd8 Remove unnecessary check prefix directives. NFC. by Chad Rosier · 9 years ago
  49. 3cc1604 [DAGCombiner] Show missed opportunity to UNDEF out-of-range SHL by Simon Pilgrim · 9 years ago
  50. 541a4fd [RegionInfo] Add three tests that include infinite loops by Tobias Grosser · 9 years ago
  51. f524b35 [SelectionDAG] Add support for vector demandedelts in SHL/SRL opcodes by Simon Pilgrim · 9 years ago
  52. 6392d73 [X86] Add knownbits vector logical shift test by Simon Pilgrim · 9 years ago
  53. 4a04eb0 [ARM] Thumb2 LDR (literal) should accept PC as the destination by Oliver Stannard · 9 years ago
  54. b2e86a3 [SCEVExpander] Hoist unsigned divisons when safe by Sanjoy Das · 9 years ago
  55. ea50f98 [SCEVExpander] Don't hoist divisions by Sanjoy Das · 9 years ago
  56. 32c8804 Lift out a helper lambda; NFC by Sanjoy Das · 9 years ago
  57. 79013e5 [AVX-512] Allow legacy cvtpd2dq intrinsics to select EVEX encoded instruction when available. by Craig Topper · 9 years ago
  58. 8943248 [AVX-512][X86] Convert avx_cvtt_ps2dq_256 and sse2_cvttps2dq intrinsics to ISD::FP_TO_SINT in the intrinsics table and delete patterns. While nearby also move CVTDQ2PS patterns into their instructions. by Craig Topper · 9 years ago
  59. 70894ee [X86] Convert int_x86_avx_cvtt_pd2dq_256 to fp_to_sint using the intrinsics table. Removes extra patterns and allows legacy intrinsic to select EVEX encoded instructions when available. by Craig Topper · 9 years ago
  60. 7cf26e1 [X86] Move some custom patterns into the currently empty pattern of their corresponding instructions. NFC by Craig Topper · 9 years ago
  61. 66d2306 [X86] Remove some patterns still referencing int_x86_sse2_cvttpd2dq that should have been removed in r286344. NFC by Craig Topper · 9 years ago
  62. 2513e75 [SCEV] Eta reduce some lambdas; NFC by Sanjoy Das · 9 years ago
  63. 40cc2d9 [LangRef] Drop "experimental" caveat from operand bundles by Sanjoy Das · 9 years ago
  64. 5ffdf01 [AVX-512] Add test cases to show missed opportunities for using VALIGND/Q to handle shuffles. by Craig Topper · 9 years ago
  65. 9c5e4ba [InstCombine] avoid infinite loop from shuffle-extract-insert sequence (PR30923) by Sanjay Patel · 9 years ago
  66. 027f4d0 Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86. by Peter Collingbourne · 9 years ago
  67. 619ca04 [AVR] Add a selection of CodeGen tests by Dylan McKay · 9 years ago
  68. 64af251 [AVR] Add all of the machine code test suite by Dylan McKay · 9 years ago
  69. 35ce2db Add isHotBB helper function to ProfileSummaryInfo by Dehao Chen · 9 years ago
  70. 0e23db6 Preserve assumption cache in loop-rotate. by Eli Friedman · 9 years ago
  71. 5224b5a GlobalISel: fix typo. NFC by Tim Northover · 9 years ago
  72. e6797b7 GlobalISel: translate invoke and landingpad instructions by Tim Northover · 9 years ago
  73. 7467893 Update vectorization debug info unittest. by Dehao Chen · 9 years ago
  74. b347251 [InstCombine] regenerate checks; NFC by Sanjay Patel · 9 years ago
  75. c4a40a2 [InstCombine] regenerate checks; NFC by Sanjay Patel · 9 years ago
  76. 0034728 [tools] Unbreak the GCC build (workaround a GCC bug). by Davide Italiano · 9 years ago
  77. d964c86 Make BitcodeReader::parseIdentificationBlock() robust to EOF by Mehdi Amini · 9 years ago
  78. faf81d7 Minor unroll pass refacoring. by Evgeny Stupachenko · 9 years ago
  79. e77b2fd [Verifier] clang-format a section; NFC by Sanjoy Das · 9 years ago
  80. e3d8a20 [SCEV] Refactor out a useful pattern; NFC by Sanjoy Das · 9 years ago
  81. 7deb9ee Revert r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate." by Peter Collingbourne · 9 years ago
  82. 7e3e10a X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate. by Peter Collingbourne · 9 years ago
  83. d73ad9f [Hexagon] Silence "sometimes uninitialized" warning in HexagonCopyToCombine by Krzysztof Parzyszek · 9 years ago
  84. 76c218e Bitcode: Change the materializer interface to return llvm::Error. by Peter Collingbourne · 9 years ago
  85. 5d84a07 [Hexagon] Separate Hexagon subreg indices for different register classes by Krzysztof Parzyszek · 9 years ago
  86. 0f89628 [Hexagon] Eliminate Insert4 pseudo-instruction, use combines instead by Krzysztof Parzyszek · 9 years ago
  87. e6c9f7f [SystemZ] A few fixes in scheduler files. by Jonas Paulsson · 9 years ago
  88. 15f3ab0 Remove TimeValue usage from Scalar/SROA.cpp. NFC. by Pavel Labath · 9 years ago
  89. 517cd17 Zero-initialize chrono duration objects by Pavel Labath · 9 years ago
  90. 73ce0c0 [dsymutil] Replace TimeValue with TimePoint by Pavel Labath · 9 years ago
  91. 6192bd7 [mips] Add non-const getter for the Elf_Mips_Options class. NFC by Simon Atanasyan · 9 years ago
  92. e9ba8f3 [MachineScheduler] Comments fixing. by Jonas Paulsson · 9 years ago
  93. 32054b5 [ARM] Loop Strength Reduction crashes when targeting ARM or Thumb. by Alexandros Lamprineas · 9 years ago
  94. 1f641ae [AVX-512] Add lowering to cvttpd2udq/cvttps2udq for fptoui v2f64/2f32 to 2i32 by Craig Topper · 9 years ago
  95. 45b3e8f [X86] Lower AVX512 and SSE intrinsics for CVTTPD2DQ to X86ISD::CVTTPD2DQ. by Craig Topper · 9 years ago
  96. 106bb1f [AVX-512] Add more varied alignments to tests for storing the lower 128-bits of a 256 or 512-bit subvector extract. by Craig Topper · 9 years ago
  97. 4c1b9a2 [AVX-512] Use alignedstore256 in patterns that look for stores of the lower 256-bits of a 512-bit vector to use a 256-bit aligned store. by Craig Topper · 9 years ago
  98. 89f0495 [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract. by Craig Topper · 9 years ago
  99. f43d5af [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction set is also enabled. by Craig Topper · 9 years ago
  100. 2adde22 [XRay][docs] Fix llvm snippets to be well-formed by Dean Michael Berris · 9 years ago