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review.blissroms.org / platform_external_llvm / 7d4ff60b55772c731688cd27f9252e31ae964f84
  1. 7d4ff60 Fix loop style by Matt Arsenault · 12 years ago
  2. f24caa4 Split the llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m testcase into a CFE and LLVM part. by Adrian Prantl · 12 years ago
  3. 74a4533 Remove the old CodePlacementOpt pass. by Benjamin Kramer · 12 years ago
  4. 975ee54 Fix a typo by Nadav Rotem · 12 years ago
  5. 65063fe Hexagon: Disable DwarfUsesInlineInfoSection flag. by Jyotsna Verma · 12 years ago
  6. f5d5c43 Add PPC FP rounding instructions fri[mnpz] by Hal Finkel · 12 years ago
  7. ef484a3 Revert "Fix allocations of SmallVector and SmallPtrSet so they are more prone to" by Rafael Espindola · 12 years ago
  8. 6173309 Fix allocations of SmallVector and SmallPtrSet so they are more prone to by Jean-Luc Duprat · 12 years ago
  9. ae07bf3 Removed trailing whitespace. by Michael Gottesman · 12 years ago
  10. fda56e5 [mips] Change type of accumulator registers to Untyped. Add two more accumulator by Akira Hatanaka · 12 years ago
  11. c713e99 [mips] Define overloaded versions of storeRegToStack and loadRegFromStack. by Akira Hatanaka · 12 years ago
  12. 8c0b9b0 [mips] Add parameter Alignment to MipsFrameLowering's constructor. by Akira Hatanaka · 12 years ago
  13. 1cbd401 Revert r178166. According to Howard, this code is actually ok. by Dan Gohman · 12 years ago
  14. af7da5c [Mips Assembler] Add support for OR macro with imediate opperand by Jack Carter · 12 years ago
  15. c26392a Add support of RDSEED defined in AVX2 extension by Michael Liao · 12 years ago
  16. 258d9b7 Enhance boolean simplification to handle 16-/64-bit RDRAND by Michael Liao · 12 years ago
  17. 816f6d0 Skip moving call address loading into callseq when targets prefer register indirect call. by Michael Liao · 12 years ago
  18. d02e46b Removed dead code from ObjCARCOpts relating to tracking objc_retainBlocks through the ARC Dataflow analysis. By the time we get to the ARC dataflow analysis, any objc_retainBlock calls are not optimizable. by Michael Gottesman · 12 years ago
  19. 7ae3bb8 [fast-isel] Add a preemptive fix for the case where we fail to materialize an by Chad Rosier · 12 years ago
  20. 94fcfaf [Mips Assembler] Add alias definitions for jal by Jack Carter · 12 years ago
  21. bad24f7 Add the X86 FMAs to the scheduling model. by Nadav Rotem · 12 years ago
  22. f2a2806 Minor simplification. by Bill Wendling · 12 years ago
  23. 59af9d0 Add the Haswell machine model. by Nadav Rotem · 12 years ago
  24. 0b6a69d Remove the unused port from the SandyBridge machine model by Nadav Rotem · 12 years ago
  25. 5a8386e Add ADX CPUID detection by Michael Liao · 12 years ago
  26. 8e4cd40 These two are default in the constructor for MCAsmInfo. by Eric Christopher · 12 years ago
  27. a46f82d Make Win32 put the SRet address into EAX, fixes PR15556 by Timur Iskhodzhanov · 12 years ago
  28. af0d148 Specify CPUs on the PPC bswap-load-store test by Hal Finkel · 12 years ago
  29. 2544f22 Only enable 64-bit bswap DAG combines for PPC64 by Hal Finkel · 12 years ago
  30. 3832eff Non optimizable objc_retainBlock calls are not forwarding. by Michael Gottesman · 12 years ago
  31. 0d92a3c [ObjCARC] Strength reduce objc_retainBlock -> objc_retain if the objc_retainBlock is optimizable. by Michael Gottesman · 12 years ago
  32. 810848d Hexagon: Replace switch-case in isDotNewInst with TSFlags. by Jyotsna Verma · 12 years ago
  33. b52980b Fix bad indentation in r178276 by Hal Finkel · 12 years ago
  34. e41c7d4 Hexagon: Enable SupportDebugInfomation and DwarfInSection flags. by Jyotsna Verma · 12 years ago
  35. fc822ce Remove -O3. by Akira Hatanaka · 12 years ago
  36. 53774a8 Use direct types in most PowerPC Altivec instructions and patterns. by Bill Schmidt · 12 years ago
  37. efdd467 Add the PPC64 ldbrx/stdbrx instructions by Hal Finkel · 12 years ago
  38. ce88835 Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set. by Gordon Keiser · 12 years ago
  39. 93b1078 Testing commit access to llvm. Remove two lines of whitespace from the Thumb README. by Gordon Keiser · 12 years ago
  40. 7f5f06b Correct spelling of Git. by Thomas Schwinge · 12 years ago
  41. 30509ee Move test since it depends on the X86 backend. by Rafael Espindola · 12 years ago
  42. 4f2ef94 Hexagon: Use multiclass for gp-relative instructions. by Jyotsna Verma · 12 years ago
  43. aab2305 Seciton 24.2.2 of the C++ standard, [iterator.iterators], Table 106 by Howard Hinnant · 12 years ago
  44. 42a1b2f AArch64: implement GICv3 system registers by Tim Northover · 12 years ago
  45. c53ab4d Add the PPC64 popcntd instruction by Hal Finkel · 12 years ago
  46. f464481 [tsan] make sure memset/memcpy/memmove are not inlined in tsan mode by Kostya Serebryany · 12 years ago
  47. 21fb019 Revert "Updated ELF relocation test for .eh_frame section" by Michael Gottesman · 12 years ago
  48. 9f41d22 Disable JIT/MCJIT tests in unittests/ExecutionEngine for the targets that don't support JIT. by Jyotsna Verma · 12 years ago
  49. d957f95 Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions by Hal Finkel · 12 years ago
  50. d01efc7 Fix typo in PPCInstr64Bit by Hal Finkel · 12 years ago
  51. 72dfb05 Revert "Adding DIImportedModules to DIScopes." by David Blaikie · 12 years ago
  52. d7216a2 Check if Type is a vector before calling function Type::getVectorNumElements. by Akira Hatanaka · 12 years ago
  53. 1fd36e4 This patch follows is a follow up to r178171, which uses the register by Preston Gurd · 12 years ago
  54. c8d6536 Updated ELF relocation test for .eh_frame section by Jack Carter · 12 years ago
  55. dd40e8c [ms-inline asm] Add support of imm displacement before bracketed memory by Chad Rosier · 12 years ago
  56. f25f93b Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in PPCInstrInfo by Hal Finkel · 12 years ago
  57. 09d27fb test file name change to correct typo by Jack Carter · 12 years ago
  58. 1edadea by Preston Gurd · 12 years ago
  59. e915047 Fix typo (common to both X86 and PPC) by Hal Finkel · 12 years ago
  60. fc80586 Remove more dead LR-as-GPR PPC code by Hal Finkel · 12 years ago
  61. dcdc0fa Avoid undefined behavior from passing a std::vector's own contents by Dan Gohman · 12 years ago
  62. e77918c Remove "gpr0 allocation" from the PPC README TODO list by Hal Finkel · 12 years ago
  63. 2b7f219 Don't try to generate crash diagnostics if we had an I/O failure. It's very by Chad Rosier · 12 years ago
  64. ce94557 Add a boolean parameter to the llvm::report_fatal_error() function to indicated by Chad Rosier · 12 years ago
  65. d99a29e Specutively revert r178130. by Bill Wendling · 12 years ago
  66. 3545043 Fix comment by David Blaikie · 12 years ago
  67. 7fe65d6 Cleanup the simplify_type implementation. by Rafael Espindola · 12 years ago
  68. 00b3b5f R600/SI: add SETO/SETUO patterns by Christian Konig · 12 years ago
  69. 2b393fb Silence warning about mixing || in &&, fix up 80-cols. by Benjamin Kramer · 12 years ago
  70. 32e12df Print PPC ZERO as 0 (not r0) even on Darwin by Hal Finkel · 12 years ago
  71. fe37e62 Switch to LLVM support function abs64 to keep VS2008 happy. by Tim Northover · 12 years ago
  72. f647052 Disable ASan/MSan symbolization of reports in tests. by Evgeniy Stepanov · 12 years ago
  73. 26998ee Fix target-customized spilling in the register scavenger by Hal Finkel · 12 years ago
  74. d6d0ebb Disable Initialize.MultipleThreads test under MemorySanitizer. by Evgeniy Stepanov · 12 years ago
  75. a210db7 Enabling the generation of dependency breakers for partial updates on Cortex-A15. Also fixing a small bug in getting the update clearence for VLD1LNd32. by Silviu Baranga · 12 years ago
  76. 0f68070 Hexagon: Disable optimizations at O0. by Jyotsna Verma · 12 years ago
  77. cfe99ef Improve performance of LinkModules when linking with modules with large numbers of functions which link lazily. Instead of creating and destroying function prototypes irrespective of if they are used, only create them if they are used. by James Molloy · 12 years ago
  78. e492308 R600/SI: add cummuting of rev instructions by Christian Konig · 12 years ago
  79. 45b14e3 R600/SI: add mulhu/mulhs patterns by Christian Konig · 12 years ago
  80. a62b1a1 R600/SI: add srl/sha patterns for SI by Christian Konig · 12 years ago
  81. 240b7f3 Allocate r0 on PPC by Hal Finkel · 12 years ago
  82. 6375e1b Use the PPC no-r0 class on the TOC LD pseudos by Hal Finkel · 12 years ago
  83. ab42ec2 Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudos by Hal Finkel · 12 years ago
  84. 56d926a Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructions by Hal Finkel · 12 years ago
  85. 37ef805 Remove the link register from the GPR classes on PowerPC. by Bill Schmidt · 12 years ago
  86. d841d6f Added back in the test for arc-annotations. by Michael Gottesman · 12 years ago
  87. 342d92c Adding DIImportedModules to DIScopes. by David Blaikie · 12 years ago
  88. b7e11e4 Don't spill PPC VRSAVE on non-Darwin (even in SjLj) by Hal Finkel · 12 years ago
  89. ca442a4 Make DIBuilder::createClassType more type safe by returning DICompositeType rather than DIType by David Blaikie · 12 years ago
  90. f34ea64 DebugInfo: more support for mutating DICompositeType to reduce magic number usage in Clang by David Blaikie · 12 years ago
  91. 847e36f Add a boolean parameter to the ExecuteAndWait static function to indicated by Chad Rosier · 12 years ago
  92. 39c41c3 Use the full path when outputting the `.gcda' file. by Bill Wendling · 12 years ago
  93. f8fd883 Add XTEST codegen support by Michael Liao · 12 years ago
  94. 0ca1a7f Add HLE target feature by Michael Liao · 12 years ago
  95. 6b359ec Enable SandyBridgeModel for all modern Intel P6 descendants. by Jakob Stoklund Olesen · 12 years ago
  96. d072a16 Debug Info: Provide a means to update the members of a composite type by David Blaikie · 12 years ago
  97. 1a0034c Restore real bit lengths on PPC register numbers by Hal Finkel · 12 years ago
  98. 82e7c4f TableGen SubtargetEmitter fix to allow A9 and Swift to coexist. by Andrew Trick · 12 years ago
  99. df23a60 Fix the register scavenger for targets that provide custom spilling by Hal Finkel · 12 years ago
  100. aa6047d PPC: Use HWEncoding and TRI->getEncodingValue by Hal Finkel · 12 years ago