- e16c86e [X86] Remove 16-bit and 32-bit offset jump instructions from the AsmParser. We always select the 8-bit size and let the assembler backend relax to the larger size. by Craig Topper · 11 years ago
- 1299ae2 [X86] Make isel select the shorter form of jump instructions instead of the long form. by Craig Topper · 11 years ago
- 5b12a2f [PM] Add a collection of no-op analysis passes and switch the new pass by Chandler Carruth · 11 years ago
- 2e306ca [PM] Sink the no-op pass parsing logic into the .def-based registry to by Chandler Carruth · 11 years ago
- 2bbc5ab [PM] Move the analysis registry into the Passes.cpp file and provide by Chandler Carruth · 11 years ago
- a3376d2 [PM] Add a utility to the new pass manager for generating a pass which by Chandler Carruth · 11 years ago
- 5165dfd Add a testcase that would have found the problem in r225048. by Rafael Espindola · 11 years ago
- 248063b Remove dead variable. by Eric Christopher · 11 years ago
- 943a34f Use the same call off of the TargetMachine rather than the subtarget. by Eric Christopher · 11 years ago
- 1abeb77 Rewrite the Mips16HardFloat pass to avoid using the Subtarget. by Eric Christopher · 11 years ago
- bce877c Revert r225048: It broke ObjC on AArch64. by Lang Hames · 11 years ago
- 0d3cd75 Remove X86 .quad workaround for buggy GNU assembler on OpenBSD / Bitrig. by Brad Smith · 11 years ago
- 97d1c07 IR: Don't drop MDNode uniquing on null operands by Duncan P. N. Exon Smith · 11 years ago
- 2f79820 Revert "Use the integrated assembler by default on 32-bit PowerPC and SPARC" by Duncan P. N. Exon Smith · 11 years ago
- 38c3e2f [PowerPC] Fix test to pass on Darwin hosts by Hal Finkel · 11 years ago
- a767eed [PowerPC] Remove old README.txt entry by Hal Finkel · 11 years ago
- a5b2142 [X86][SSE] lowerVectorShuffleAsByteShift tidyup by Simon Pilgrim · 11 years ago
- fcfee17 [PowerPC] Convert a README.txt entry into a better test by Hal Finkel · 11 years ago
- a45b581 Use the integrated assembler by default on 32-bit PowerPC and SPARC by Brad Smith · 11 years ago
- 92a87c6 [PowerPC] Remove README.txt entry by Hal Finkel · 11 years ago
- e4f1dcd [Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references. by Colin LeMahieu · 11 years ago
- 1b84bf2 [PowerPC] Add a test for truncating a shifted load by Hal Finkel · 11 years ago
- 0c36e97 Make DIE.h a public CodeGen header. by Frederic Riss · 11 years ago
- 5a0743e [dsymutil] Implement the BinaryHolder object and gain archive support. by Frederic Riss · 11 years ago
- 27c27a0 [autoconf] llvm/cmake/modules/Makefile: Make sure to regenerate LLVMConfig.cmake whenever Makefile is updated. by NAKAMURA Takumi · 11 years ago
- e7d845b [PowerPC] Add another test for load/store with update by Hal Finkel · 11 years ago
- 75beb04 [autoconf] Export LLVM_LIBDIR_SUFFIX with empty string in LLVMConfig.cmake. tools/llvm-config is also doing so. by NAKAMURA Takumi · 11 years ago
- ccc83e4 [PowerPC] Fold i1 extensions with other ops by Hal Finkel · 11 years ago
- dd05528 [X86][SSE] Fixed description for isSequentialOrUndefInRange. NFC. by Simon Pilgrim · 11 years ago
- ca96263 [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating shifts. by Colin LeMahieu · 11 years ago
- d43539c IR: Prune arguments to ValueAsMetadata::ValueAsMetadata() by Duncan P. N. Exon Smith · 11 years ago
- 27494b0 [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding bits. by Colin LeMahieu · 11 years ago
- c8e734a [Hexagon] Adding V4 logic-logic instructions and tests. by Colin LeMahieu · 11 years ago
- e48ec2a [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions. by Colin LeMahieu · 11 years ago
- 3ab10c1 [PowerPC] Remove zexts after i32 ctlz by Hal Finkel · 11 years ago
- 0ef9972 [PowerPC] Remove zexts after byte-swapping loads by Hal Finkel · 11 years ago
- 9e989cf [Hexagon] Adding round reg/imm and bitsplit instructions. by Colin LeMahieu · 11 years ago
- e5f0755 SymbolRewriter: use iplist::splice by Saleem Abdulrasool · 11 years ago
- 02d601d SymbolRewriter: 80-column by Saleem Abdulrasool · 11 years ago
- 3c9fb6e [AArch64] Improve codegen of store lane instructions by avoiding GPR usage. by Ahmed Bougacha · 11 years ago
- c52cd83 [AArch64] Improve codegen of store lane 0 instructions by directly storing the subregister. by Ahmed Bougacha · 11 years ago
- 19d9f34 llvm/test/lit.cfg: have_ld_plugin_support(): Use decode() for stdout. by NAKAMURA Takumi · 11 years ago
- 050064d Select lower fsub,fabs pattern to fabd on AArch64 by Karthik Bhat · 11 years ago
- 6abfc44 Parse Tag_compatibility correctly. by Charlie Turner · 11 years ago
- b99b8ff Emit the build attribute Tag_conformance. by Charlie Turner · 11 years ago
- e239724 Select lower sub,abs pattern to sabd on AArch64 by Karthik Bhat · 11 years ago
- 25903ef Fix broken test from r225159. by Michael Kuperstein · 11 years ago
- 1ab487f [PM] Don't run the machinery of invalidating all the analysis passes by Chandler Carruth · 11 years ago
- 040ca44 [PM] Add names and debug logging for analysis passes to the new pass manager. by Chandler Carruth · 11 years ago
- 9bf7351 Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert. by Craig Topper · 11 years ago
- 614fe87 Fixed a bug in memory dependence checking module of loop vectorization. The following loop should not be vectorized with current algorithm. by Jiangning Liu · 11 years ago
- 16c2e77 Convert SmallMapVector from a class to a struct. by Michael Gottesman · 11 years ago
- a5ba79e [X86] Remove the predicates from the register forms of the 2-byte inc and dec instructions. Remove the 32-bit mode only versions that existed for the disassembler. Move the patterns out of the instructions so they can still be qualified with predicates. by Craig Topper · 11 years ago
- 34f96b9 [X86] Simplify code a little by just summing flags instead of conditionally incrementing. NFC by Craig Topper · 11 years ago
- a481b50 [X86] Remove unnecessary redeclaration of a variable with the same assignment as the beginning of the function. NFC. by Craig Topper · 11 years ago
- d571fdb [X86] Remove a strange fixme referring to a hack that doesn't seem to exist since the code is in a comment. Can't figure out what the body of the 'if' was supposed to be anyway. by Craig Topper · 11 years ago
- 1d8d3b6 [x86] Reduce text duplication for similar operand class declarations in tablegen instruction info. No functional change intended. by Craig Topper · 11 years ago
- 68f83ee [X86] Fix the immediate size to match the address size in the operand types for the move to/from absolute memory instructions. by Craig Topper · 11 years ago
- 3249372 [X86] Remove unused operand type from disassembler handling. NFC by Craig Topper · 11 years ago
- 0ef8f31 [PowerPC] Enable speculation of cttz/ctlz by Hal Finkel · 11 years ago
- 4f9a727 [SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, an by Chandler Carruth · 11 years ago
- edef084 [LangRef] Correct a typo by Hal Finkel · 11 years ago
- 9cad6c8 [PowerPC] Materialize i64 constants using rotation with masking by Hal Finkel · 11 years ago
- 5634622 [PM] Cleanup a place where I forgot to update the header guards when by Chandler Carruth · 11 years ago
- b246ace [PM] Switch the new pass manager to use a reference-based API for IR units. by Chandler Carruth · 11 years ago
- 51fa09d [PM] Wire up support for explicitly running the verifier pass. by Chandler Carruth · 11 years ago
- 186c5cc [PM] Cleanup a const_cast and other machinery left over in this code by Chandler Carruth · 11 years ago
- c0c3608 [X86][SSE] Added vector packing test for pr12412 by Simon Pilgrim · 11 years ago
- dc18ec0 [X86][SSE] Added vector integer truncation tests - based off pr15524 by Simon Pilgrim · 11 years ago
- 2ac0826 [PowerPC] Materialize i64 constants using rotation by Hal Finkel · 11 years ago
- 7362319 Fix unused variable warning for non-asserts builds. NFC. by Michael Kuperstein · 11 years ago
- d138a7b [PowerPC] Materialize i64 constants using bit inversion by Hal Finkel · 11 years ago
- 5a9cd4d [PM] Split the AssumptionTracker immutable pass into two separate APIs: by Chandler Carruth · 11 years ago
- 07d7dba InstCombine: match can find ConstantExprs, don't assume we have a Value by David Majnemer · 11 years ago
- 77e22b7 ValueTracking: ComputeNumSignBits should tolerate misshapen phi nodes by David Majnemer · 11 years ago
- a46dd58 [APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero. by Lang Hames · 11 years ago
- b19a485 llvm-readobj: add support to dump COFF export tables by Saleem Abdulrasool · 11 years ago
- 97f8f69 ARM: permit tail calls to weak externals on COFF by Saleem Abdulrasool · 11 years ago
- e05b232 [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preference by Hal Finkel · 11 years ago
- a1d22cc [PowerPC] Use 16-byte alignment for modern cores for functions/loops by Hal Finkel · 11 years ago
- 00d70e9 Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers. by Craig Topper · 11 years ago
- 2717b06 Fix some formatting in tablegen output. by Craig Topper · 11 years ago
- 577a768 Replace some 'unreachable' comments with llvm_unreachable. by Craig Topper · 11 years ago
- ef8f7e1 ValueTracking: Make computeKnownBits for Arguments a little more clear by David Majnemer · 11 years ago
- 958b670 [PowerPC] Add support for the CMPB instruction by Hal Finkel · 11 years ago
- 8c6ae10 [asan] simplify the tracing code, make it use the same guard variables as coverage by Kostya Serebryany · 11 years ago
- 01c9989 [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. by Craig Topper · 11 years ago
- e3c9646 [X86] Use 32-bit sign extended immediate for 64-bit LOCK_ArithBinOp with sign extended immediate. by Craig Topper · 11 years ago
- b920271 [PM] Add proper documentation for the ModulePassManager and by Chandler Carruth · 11 years ago
- fd548d5 [PM] Actually include the correct file name. Sorry for the breakage. by Chandler Carruth · 11 years ago
- 87df619 [PM] Lift the majority of the template boilerplate used to implement the by Chandler Carruth · 11 years ago
- b5e9ce6 [PM] Fix some formatting where clang-format has improved recently. by Chandler Carruth · 11 years ago
- 8c599f7 Reformat statepoint documentation and fix a couple of typos by Philip Reames · 11 years ago
- 7fee03e Improved comments. No functional change intended. by Andrea Di Biagio · 11 years ago
- 8ae0fd2 [X86] Bring some better consistency to the naming of the move to/from %al/ax/eax/rax with memory offset. by Craig Topper · 11 years ago
- 5e9c621 InstCombine: Detect when llvm.umul.with.overflow always overflows by David Majnemer · 11 years ago
- 25e8e79 Analysis: Reformulate WillNotOverflowUnsignedMul for reusability by David Majnemer · 11 years ago
- 71fc42d [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates. by Craig Topper · 11 years ago
- ce7f347 [SROA] Teach SROA to be more aggressive in splitting now that we have by Chandler Carruth · 11 years ago
- 888ee76 [SROA] Make the computation of adjusted pointers not leak GEP instructions. by Chandler Carruth · 11 years ago