- f097e13 [InstCombine] replace divide-by-constant checks with asserts; NFC by Sanjay Patel · 9 years ago
- bb0403b Add StringRef::take_front and StringRef::take_back by Zachary Turner · 9 years ago
- 298afcc Add StringRef::contains() by Zachary Turner · 9 years ago
- 558d668 [InstCombine] clean up foldICmpDivConstant; NFCI by Sanjay Patel · 9 years ago
- f81c893 ADT: Clean up docs and formatting for ilist_traits, NFC by Duncan P. N. Exon Smith · 9 years ago
- f1f27bb ADT: Split out simple_ilist, a simple intrusive list by Duncan P. N. Exon Smith · 9 years ago
- 788dfe5 Fixup r279618, instantiate *AnalysisManagerProxy<*AnalysisManager,LazyCallGraph::SCC>, instead of *AnalysisManagerProxy<*AnalysisManager,LazyCallGraph::SCC,LazyCallGraph&>, for PassID. by NAKAMURA Takumi · 9 years ago
- 39dbb53 [AMDGPU] Refactor SOP instructions TD files. by Valery Pykhtin · 9 years ago
- db6b577 Revert "[ORC][RPC] Make the future type of an Orc RPC call Error/Expected rather than" by Reid Kleckner · 9 years ago
- 72187d4 [libFuzzer] fix a bug when running a single unit of N bytes with -max_len=M, M<N, caused a buffer overflow by Kostya Serebryany · 9 years ago
- 773652b [libFuzzer] stop using bits for memcmp's value profile -- seems to blow up the corpus too much by Kostya Serebryany · 9 years ago
- 0d8f244 [MC] Move parser helper functions from Asmparser to MCAsmParser by Nirav Dave · 9 years ago
- 2a7897d [Reassociate] Add additional debug output. NFC. by Chad Rosier · 9 years ago
- 84ea382 SILoadStoreOptimizer.cpp: Fix a warning in r279991. [-Wunused-variable] by NAKAMURA Takumi · 9 years ago
- 95bbd1e [SimplifyCFG] Properly CSE metadata in SinkThenElseCodeToEnd by James Molloy · 9 years ago
- eaff23d docs: mention that clobbering output regs in inline asm is illegal. by Peter Zotov · 9 years ago
- 696fea9 [llvm-cov] Use the native path in the coverage report. by Ying Yi · 9 years ago
- ba87832 [Support][Error] Suppress warning about unused result. by Lang Hames · 9 years ago
- fd61a98 [Support] Add a conditionally defined default constructor (available on MSVC by Lang Hames · 9 years ago
- 8f4d66d Replace incorrect "#ifdef DEBUG" with "#ifndef NDEBUG". by James Y Knight · 9 years ago
- c7c6f45 [libFuzzer] use bits instead of bytes for memcmp/strcmp value profile -- the fuzzer reaches the goal much faster, at least on the simple puzzles by Kostya Serebryany · 9 years ago
- 23b4641 [RewriteStatepointsForGC] Update comment for same PHI node check. NFC by Anna Thomas · 9 years ago
- 9e15636 [ORC][RPC] Reword 'async' to 'non-blocking' to better reflect call primitive by Lang Hames · 9 years ago
- c1d8a15 [PowerPC] Force entry alignment in .got2 by Hal Finkel · 9 years ago
- 08f02f5 Fix coding style; NFC by Sanjoy Das · 9 years ago
- e86c615 ADT: Explode include/llvm/ADT/{ilist,ilist_node}.h, NFC by Duncan P. N. Exon Smith · 9 years ago
- ff612bc [libFuzzer] use trace-div and trace-gep for guided fuzzing, add tests by Kostya Serebryany · 9 years ago
- 8c23b33 [sanitizer-coverage] add two more modes of instrumentation: trace-div and trace-gep, mostly usaful for value-profile-based fuzzing; llvm part by Kostya Serebryany · 9 years ago
- 557221a [PowerPC] Add support for -mlongcall by Hal Finkel · 9 years ago
- bad305a NFC: add early exit in ModuleSummaryAnalysis by Piotr Padlewski · 9 years ago
- 9cb78e2 [PowerPC] Add triple to test/CodeGen/PowerPC/atomic-2.ll for ppc64le by Hal Finkel · 9 years ago
- ba63e29 Rename unittests/ADT/ilistTestTemp.cpp => IListTest.cpp by Duncan P. N. Exon Smith · 9 years ago
- 1d79fff ADT: Give ilist<T>::reverse_iterator a handle to the current node by Duncan P. N. Exon Smith · 9 years ago
- 460ff94 AMDGPU/R600: Cleanup DAGCombine by Jan Vesely · 9 years ago
- 908f420 [ORC] Fix unit-test breakage from r280016. by Lang Hames · 9 years ago
- 1169682 Fix typo in comment. NFC. by Michael Kuperstein · 9 years ago
- cf53871 [ThinLTO] Indirect call promotion fixes for promoted local functions by Teresa Johnson · 9 years ago
- e060ffb [PowerPC] Fix i8/i16 atomics for little-Endian targets without partword atomics by Hal Finkel · 9 years ago
- 2f811bd [SLP] Return a boolean value for these static helpers. NFC. by Chad Rosier · 9 years ago
- 79944cc AMDGPU/R600: Remove MergeVectorStores from legalization by Jan Vesely · 9 years ago
- 55a983f [ORC][RPC] Fix typo in RPC comments: call primitives on void functions return by Lang Hames · 9 years ago
- d6f8e0f [ORC][RPC] Make the future type of an Orc RPC call Error/Expected rather than by Lang Hames · 9 years ago
- 684477b [CMake] Make LLVMConfig.cmake variable names match in-tree names by Chris Bieneman · 9 years ago
- 7c20af7 GlobalISel: use multi-dimensional arrays for legalize actions. by Tim Northover · 9 years ago
- 0d977a1 Fix a thinko in r278189. by Easwaran Raman · 9 years ago
- 702e513 AMDGPU: fix mismatch tags, NFC by Saleem Abdulrasool · 9 years ago
- 2946185 ExecutionEngine: fix a bug in the movt/movw relocator by Saleem Abdulrasool · 9 years ago
- 6aad1fb [CMake] Builtins build needs LLVM_*_OUTPUT_INTDIR variables by Chris Bieneman · 9 years ago
- 1254de0 [LV] Move insertelement sequence after scalar definitions by Matthew Simpson · 9 years ago
- 5413d61 Propagate TBAA info in SelectionDAG::getIndexedLoad by Krzysztof Parzyszek · 9 years ago
- 94821da [Myriad]: add missing 'mcpu' values by Douglas Katzman · 9 years ago
- 4a5c408 AMDGPU/SI: Implement a custom MachineSchedStrategy by Tom Stellard · 9 years ago
- 6e3f5dd [asan] Enable new stack poisoning with store instruction by default by Vitaly Buka · 9 years ago
- da2666c GlobalISel: switch to SmallVector for pending legalizations. by Tim Northover · 9 years ago
- 55792f0 AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler by Tom Stellard · 9 years ago
- 9358435 ASan: remove variable only used in assertions build by Tim Northover · 9 years ago
- b3b5a54 GlobalISel: legalize frem to a libcall on AArch64. by Tim Northover · 9 years ago
- 755f9da GlobalISel: rework CallLowering so that it can be used for libcalls too. by Tim Northover · 9 years ago
- 11b4774 AMDGPU/R600: Fix fixups used for constant arrays by Matt Arsenault · 9 years ago
- fc5add2 IfConversion: Fix branch predication bug. by Kyle Butt · 9 years ago
- b8ae70f Use store operation to poison allocas for lifetime analysis. by Vitaly Buka · 9 years ago
- 997a485 [asan] Separate calculation of ShadowBytes from calculating ASanStackFrameLayout by Vitaly Buka · 9 years ago
- f94d4a7 [SimplifyCFG] Hoisting invalidates metadata by David Majnemer · 9 years ago
- e8beddd Make vec_fabs.ll pass with MSVC 2013 by Reid Kleckner · 9 years ago
- bf8ab3e [gold] Fix test accidentally regressed for newer gold by Teresa Johnson · 9 years ago
- d05e1fc [AArch64] Adjust the scheduling model for Exynos M1. by Evandro Menezes · 9 years ago
- 3262806 [StatepointsForGC] Rematerialize in the presence of PHIs by Anna Thomas · 9 years ago
- f486ff3 [LTO] Remove extraneous output by Teresa Johnson · 9 years ago
- ae5557c [Constant] remove fdiv and frem from canTrap() by Sanjay Patel · 9 years ago
- d003672 [SimplifyCFG] rename test file, regenerate checks, and add test by Sanjay Patel · 9 years ago
- bce16c6 [Coroutines] Part 9: Add cleanup subfunction. by Gor Nishanov · 9 years ago
- bbb2e05 [TargetLowering] remove fdiv and frem from canOpTrap() (PR29114) by Sanjay Patel · 9 years ago
- adef5a6 Do not use MRI::getMaxLaneMaskForVReg as a mask covering whole register by Krzysztof Parzyszek · 9 years ago
- a8fa402 AMDGPU/SI: Improve register allocation hints for sopk instructions by Tom Stellard · 9 years ago
- 6e61a44 Use the correct ctor/dtor section for dynamic-no-pic. by Rafael Espindola · 9 years ago
- 5f65d09 Mark test as XFAIL instead of disabling it everywhere. by Benjamin Kramer · 9 years ago
- 1a56948 Move code only used by codegen out of MC. NFC. by Rafael Espindola · 9 years ago
- 1801e2f Fix -Wunused-but-set-variable warning. by Haojian Wu · 9 years ago
- 675d699 AMDGPU/SI: Query AA, if available, in areMemAccessesTriviallyDisjoint() by Tom Stellard · 9 years ago
- 922af1c Fixed a bug in type legalizer for masked gather. by Igor Breger · 9 years ago
- 84cb7f4 [AVX512] In some cases KORTEST instruction may be used instead of ZEXT + TEST sequence. by Igor Breger · 9 years ago
- f0a2d5f [InstructionSelect] NumBlocks isn't defined in DEBUG build. by Haojian Wu · 9 years ago
- 51b695a [X86] Don't lower FABS/FNEG masking directly to a ConstantPool load. Just create a ConstantFPSDNode and let that be lowered. by Craig Topper · 9 years ago
- 79711e4 [AVX-512] Always use v8i64 when converting 512-bit FAND/FOR/FXOR/FANDN to integer operations when DQI isn't supported. This is consistent with the recent changes to promote logical operations to i64 vectors. by Craig Topper · 9 years ago
- 040e63a [AVX-512] Add 512-bit fabs tests with and without AVX512DQ. by Craig Topper · 9 years ago
- 572aa19 [Orc] Simplify LogicalDylib and move it back inside CompileOnDemandLayer. Also by Lang Hames · 9 years ago
- 75d5183 [AVX-512] Add support for selecting 512-bit VPABSB/VPABSW when BWI is available. by Craig Topper · 9 years ago
- 4d4300a [AVX-512] Add patterns for selecting 128/256-bit EVEX VPABS instructions. by Craig Topper · 9 years ago
- 28dc9c9 [AVX-512] Add testcases showing that we don't emit 512-bit vpabsb/vpabsw. Will be fixed in a future commit. by Craig Topper · 9 years ago
- 297f179 Fix some typos in the doc by Sylvestre Ledru · 9 years ago
- 481aed7 [x86] add tests for <3 x N> vector types (PR29114) by Sanjay Patel · 9 years ago
- 2c15995 [InstCombine] use m_APInt to allow icmp (and X, Y), C folds for splat constant vectors by Sanjay Patel · 9 years ago
- 337ddd9 [X86][AVX512] Only combine EVEX targets shuffles to shuffles of the same number of vector elements by Simon Pilgrim · 9 years ago
- afa0d10 [PowerPC] Implement lowering for atomicrmw min/max/umin/umax by Hal Finkel · 9 years ago
- 1b2a850 [Loop Vectorizer] Fixed memory confilict checks. by Elena Demikhovsky · 9 years ago
- 800ba95 [AVX-512] Promote AND/OR/XOR to v2i64/v4i64/v8i64 even when we have AVX512F/AVX512VL. by Craig Topper · 9 years ago
- 2e47cee [AVX-512] Add tests to show that we don't select masked logic ops if there are bitcasts between the logic op and the select. by Craig Topper · 9 years ago
- 460412a [X86] Rename PABSB/D/W instructions to be consistent with SSE/AVX instructions instead of ending 128/256. NFC by Craig Topper · 9 years ago
- 3ed3938 AMDGPU/R600: Enable Load combine by Jan Vesely · 9 years ago
- 53e8717 [X86] Rename predicate function that detects if requires one of the REX.B, REX.X or REX.R bits. It's old name conflicted with a function in X8II namespace that doesnt' quite do the same thing. NFC by Craig Topper · 9 years ago