| commit | 1e77c707b7c5076ca634f8b1cc82e39d3de3b1fd | [log] [tgz] |
|---|---|---|
| author | Eli Friedman <efriedma@codeaurora.org> | Tue Dec 20 20:05:07 2016 +0000 |
| committer | Eli Friedman <efriedma@codeaurora.org> | Tue Dec 20 20:05:07 2016 +0000 |
| tree | 5dfed3e7aea69d01408c5b826bad0548818e74be | |
| parent | 967c9cbd8f17fb4d145241fcb5f23ecb7b740212 [diff] |
[ARM] Implement isExtractSubvectorCheap. See https://reviews.llvm.org/D6678 for the history of isExtractSubvectorCheap. Essentially the same considerations apply to ARM. This temporarily breaks the formation of vpadd/vpaddl in certain cases; AddCombineToVPADDL essentially assumes that we won't form VUZP shuffles. See https://reviews.llvm.org/D27779 for followup fix. Differential Revision: https://reviews.llvm.org/D27774 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290198 91177308-0d34-0410-b5e6-96231b3b80d8