| commit | e5e070351653084fb24a8e63b7d2cf0804638c7d | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Mon Jul 02 17:01:54 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Mon Jul 02 17:01:54 2018 +0000 |
| tree | 509d2df6bcdd5ac10b30c3f53be3d7ae2426b087 | |
| parent | 636e853b421560733c32b974567e0c9f3a7c485b [diff] |
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned. Similarily, don't fold fp128 loads into SSE instructions if the load isn't aligned. Unless we're targeting an AMD CPU that doesn't check alignment on arithmetic instructions. Should fix PR38001 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336121 91177308-0d34-0410-b5e6-96231b3b80d8