| commit | 862291753bb9abe31b2dabbf52be4f24b2890e1c | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Fri Oct 13 00:18:58 2017 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Fri Oct 13 00:18:58 2017 +0000 |
| tree | 597a61c1d86459f1d2c4ea5721170f3fdf23d151 | |
| parent | 5cb6ac0fdba390c29bb001d8b767e8155e35533e [diff] |
[SelectionDAG] Correct the early out in SelectionDAG::getZeroExtendInReg to work properly for vector types. I don't know if we ever hit this case or not. Turning it into an assert only fired on expanding some atomic operation in a SystemZ lit test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315648 91177308-0d34-0410-b5e6-96231b3b80d8