| commit | 383a810b129aa5120d6a7f6e88e141ec4a45f61b | [log] [tgz] |
|---|---|---|
| author | Jim Grosbach <grosbach@apple.com> | Mon Aug 26 20:22:05 2013 +0000 |
| committer | Jim Grosbach <grosbach@apple.com> | Mon Aug 26 20:22:05 2013 +0000 |
| tree | 5a9f19d6f84b1995b5419b10e12b600c536c45a0 | |
| parent | 7c42ede04579373a2d3e124b4417d89430d541f3 [diff] |
ARM: Constrain regclass for TSTri instruction. Get the register class right for the TST instruction. This keeps the machine verifier happy, enabling us to turn it on for another test. rdar://12594152 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189274 91177308-0d34-0410-b5e6-96231b3b80d8