| commit | 3723787cc35f90881c09838b799bd7965b05cb8f | [log] [tgz] |
|---|---|---|
| author | Sander de Smalen <sander.desmalen@arm.com> | Fri Jul 13 08:51:57 2018 +0000 |
| committer | Sander de Smalen <sander.desmalen@arm.com> | Fri Jul 13 08:51:57 2018 +0000 |
| tree | 2eee113636128e875f142b0fc7168f17bf09d7d4 | |
| parent | b76c4539710da72f5faa43048edd396f8eb99d26 [diff] |
[AArch64][SVE] Asm: Support for insert element (INSR) instructions. Insert general purpose register into shifted vector, e.g. insr z0.s, w0 insr z0.d, x0 Insert SIMD&FP scalar register into shifted vector, e.g. insr z0.b, b0 insr z0.h, h0 insr z0.s, s0 insr z0.d, d0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336979 91177308-0d34-0410-b5e6-96231b3b80d8