| commit | 202a7a1e3fa661bf78b98d77de7e2d575facd9ee | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Mon Apr 18 06:36:55 2011 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Mon Apr 18 06:36:55 2011 +0000 |
| tree | 97061def85cfbfc4d5ad8eb737d8f3ac9ab8a7c3 | |
| parent | 1518afddea6c0a4275a9ac64a9ffe2b6b4c0600a [diff] |
Add a new bit that ImmLeaf's can opt into, which allows them to duck out of the generated FastISel. X86 doesn't need to generate code to match ADD16ri8 since ADD16ri will do just fine. This is a small codesize win in the generated instruction selector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129692 91177308-0d34-0410-b5e6-96231b3b80d8