| commit | b3cabb44c32b5a3aba9b4d23aae9723d498ea7a9 | [log] [tgz] |
|---|---|---|
| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | Thu Jul 11 08:59:12 2013 +0000 |
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | Thu Jul 11 08:59:12 2013 +0000 |
| tree | 67565add4984989a53566cb7836cfadc52f2e39e | |
| parent | 3ee0673e4f5f0324ecd0a65507009b0748ed072c [diff] |
[SystemZ] Use zeroing form of RISBG for some AND sequences RISBG can handle some ANDs for which no AND IMMEDIATE exists. It also acts as a three-operand AND for some cases where an AND IMMEDIATE could be used instead. It might be worth adding a pass to replace RISBG with AND IMMEDIATE in cases where the register operands end up being the same and where AND IMMEDIATE is smaller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186072 91177308-0d34-0410-b5e6-96231b3b80d8