commit | 8e2e33527641f1e72eaaeb15daa87f0f9160e42e | [log] [tgz] |
---|---|---|
author | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Jul 27 18:52:15 2015 +0000 |
committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Jul 27 18:52:15 2015 +0000 |
tree | c0600cc4121aaff44fa7fc7101dd8c648e27a7ac | |
parent | 2deaa2924e52f1e07102b395302e8a72d92d716c [diff] |
[InstCombine][X86][SSE] Replace sign/zero extension intrinsics with native IR Now that we are generating sane codegen for vector sext/zext nodes on SSE targets, this patch uses instcombine to replace the SSE41/AVX2 pmovsx and pmovzx intrinsics with the equivalent native IR code. Differential Revision: http://reviews.llvm.org/D11503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243303 91177308-0d34-0410-b5e6-96231b3b80d8