| commit | 4967aab1dc2d220ffff87ddc08923cc0e27c8567 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Sat Jan 12 02:22:10 2019 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Sat Jan 12 02:22:10 2019 +0000 |
| tree | 36b5c458c3ea85f7909c12d7a02ea52bc6cf121e | |
| parent | 550155b08743b6cc8e80b37cadef03e888afc4d0 [diff] |
[X86] When lowering v1i1/v2i1/v4i1/v8i1 load/store with avx512f, but not avx512dq, use v16i1 as the intermediate mask type instead of v8i1. We still use i8 for the load/store type. So we need to convert to/from i16 to around the mask type. By doing this we get an i8->i16 extload which we can then pattern match to a KMOVW if the access is aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350989 91177308-0d34-0410-b5e6-96231b3b80d8