Move spill size and alignment info from MC to TargetRegisterInfo

This is another step towards implementing register classes with
parametrized register/spill sizes.

Differential Revision: https://reviews.llvm.org/D31299


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298652 91177308-0d34-0410-b5e6-96231b3b80d8
3 files changed