commit | 0a342e99929a8eec77f23960f4d7ec6a8daf1472 | [log] [tgz] |
---|---|---|
author | Daniel Sanders <daniel.sanders@imgtec.com> | Thu Jul 17 09:57:23 2014 +0000 |
committer | Daniel Sanders <daniel.sanders@imgtec.com> | Thu Jul 17 09:57:23 2014 +0000 |
tree | 715de9de21aaf587af971960c13ab99530aea48c | |
parent | 4b5e7542df8563beb97407317e857439fa7544c8 [diff] |
[mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6 Summary: The cpr1_size field describes the minimum register width to run the program rather than the size of the registers on the target. MIPS32r6 was acting as if -mfp64 has been given because it starts off with 64-bit FPU registers. Differential Revision: http://reviews.llvm.org/D4538 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213243 91177308-0d34-0410-b5e6-96231b3b80d8