| commit | 1ad5730bb974ebd235e0e35e44ea2138d031fa61 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Mon Apr 02 06:34:16 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Mon Apr 02 06:34:16 2018 +0000 |
| tree | 8077b92c97fbdbff434127fb05ef6804d4f55fca | |
| parent | 1936d3b892e701a119767a5dbc2d530fe682de95 [diff] |
[X86][Silvermont] Use correct latency and throughput information for divide and square root in the scheduler model. Data taken from Table 16-17 in the Intel Optimization Manual. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328962 91177308-0d34-0410-b5e6-96231b3b80d8