[LV] Don't mark multi-use branch conditions uniform
Previously, we marked the branch conditions of latch blocks uniform after
vectorization if they were instructions contained in the loop. However, if a
condition instruction has users other than the branch, it may not remain
uniform. This patch ensures the conditions we mark uniform are only used by the
branch. This should fix PR30627.
Reference: https://llvm.org/bugs/show_bug.cgi?id=30627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283563 91177308-0d34-0410-b5e6-96231b3b80d8
2 files changed