commit | ec5c18ff129ffcf993e92f3a3aa2d6abf99a4563 | [log] [tgz] |
---|---|---|
author | Eugene Leviant <eleviant@accesssoftek.com> | Tue Nov 21 11:01:28 2017 +0000 |
committer | Eugene Leviant <eleviant@accesssoftek.com> | Tue Nov 21 11:01:28 2017 +0000 |
tree | 2523797ea43d5274aca2306498463c7cddb0cbe5 | |
parent | 09a18aac31f3bed46813da956ed2546764cbb210 [diff] |
[MI scheduler] Fix VADD and VSUB in cortex-a57 model This patch fixes instregex for interger vector add/sub instructions Differential revision: https://reviews.llvm.org/D40254 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318749 91177308-0d34-0410-b5e6-96231b3b80d8