| commit | f5137255b64252669f1917eda9d5b7ee648f6be4 | [log] [tgz] |
|---|---|---|
| author | Daniel Sanders <daniel_l_sanders@apple.com> | Fri Jun 08 23:12:29 2018 +0000 |
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | Fri Jun 08 23:12:29 2018 +0000 |
| tree | 8dfac4acdf6b2d2c76652de84e4e3223ca0a8411 | |
| parent | 3f7dfd74cf818b62e2f08835cd35cd23c314ccb2 [diff] |
[tablegen] Improve performance on *GenRegisterInfo.inc by replacing SparseVector with BitVector. NFC Summary: Generating X86GenRegisterInfo.inc and AArch64GenRegisterInfo.inc is 8-9% faster on my build. Reviewers: bogner, javed.absar Reviewed By: bogner Subscribers: llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D47907 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334337 91177308-0d34-0410-b5e6-96231b3b80d8