| commit | f497270e3223117db190ed4161803ae8e49dc60f | [log] [tgz] |
|---|---|---|
| author | Javed Absar <javed.absar@arm.com> | Thu Feb 02 21:08:12 2017 +0000 |
| committer | Javed Absar <javed.absar@arm.com> | Thu Feb 02 21:08:12 2017 +0000 |
| tree | fb7f9c05b858d7424ec1825aecf5e20d5d454b7c | |
| parent | 5340452c64bb5008ab3f2007bd1b09563e7e5b65 [diff] |
[ARM] Classification Improvements to ARM Sched-Model. NFCI. This is the second in the series of patches to enable adding of machine sched-models for ARM processors easier and compact. This patch focuses on integer instructions and adds missing sched definitions. Reviewers: rovka, rengolin Differential Revision: https://reviews.llvm.org/D29127 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293935 91177308-0d34-0410-b5e6-96231b3b80d8