79402ee6f96ff3be95b445286d91d0d87b5a3cc9 - platform_external_llvm80

commit	79402ee6f96ff3be95b445286d91d0d87b5a3cc9	[log] [tgz]
author	Craig Topper <craig.topper@gmail.com>	Sat Dec 05 07:13:35 2015 +0000
committer	Craig Topper <craig.topper@gmail.com>	Sat Dec 05 07:13:35 2015 +0000
tree	3f45165550e611950ae03e3bde6c9e9fb3a6e9c2
parent	83f50fab5317ea62c8298a82c1de5054d5795ac9 [diff]

Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254843 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/CallingConvLower.h[diff]
include/llvm/MC/MCInstrDesc.h[diff]
lib/CodeGen/MIRParser/MIParser.cpp[diff]
lib/CodeGen/MachineInstr.cpp[diff]
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp[diff]
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp[diff]
lib/MC/MCInstrDesc.cpp[diff]
lib/MC/MCParser/AsmParser.cpp[diff]
lib/Target/AArch64/AArch64CallingConvention.h[diff]
lib/Target/ARM/ARMCallingConv.h[diff]
lib/Target/ARM/ARMFastISel.cpp[diff]
lib/Target/ARM/Thumb2SizeReduction.cpp[diff]
lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp[diff]
lib/Target/Hexagon/HexagonGenMux.cpp[diff]
lib/Target/Hexagon/HexagonISelLowering.cpp[diff]
lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp[diff]
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp[diff]
lib/Target/PowerPC/PPCFrameLowering.cpp[diff]
lib/Target/PowerPC/PPCInstrInfo.cpp[diff]
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp[diff]
utils/TableGen/InstrInfoEmitter.cpp[diff]

21 files changed

tree: 3f45165550e611950ae03e3bde6c9e9fb3a6e9c2