| commit | a7204c7b8c5a41444078828a98030cb091e007fd | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Tue Feb 13 16:25:25 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Tue Feb 13 16:25:25 2018 +0000 |
| tree | 2e1e073810fe92dba2bf9f769e7131d8943d759b | |
| parent | 0140a14c552fc16b719f0fcf427b6bdf89074026 [diff] |
[X86] Add combine to shrink 64-bit ands when one input is an any_extend and the other input guarantees upper 32 bits are 0. Summary: This gets the shift case from PR35792. Reviewers: spatel, RKSimon Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43222 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325018 91177308-0d34-0410-b5e6-96231b3b80d8