| commit | 3b3fa38731702a6fea7f6477ffd9aa41dfe36e30 | [log] [tgz] |
|---|---|---|
| author | Tilmann Scheller <t.scheller@samsung.com> | Fri Aug 01 12:08:04 2014 +0000 |
| committer | Tilmann Scheller <t.scheller@samsung.com> | Fri Aug 01 12:08:04 2014 +0000 |
| tree | 5ba1445edcc13770b893df707d493fac60e8d6da | |
| parent | 9bd0d2a6a02750f51633ea20394c37a9c5457eaa [diff] |
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instructions. The ARM ARM prohibits LDRB/LDRSB instructions with writeback into the destination register. With this commit this constraint is now enforced and we stop assembling LDRH/LDRSH instructions with unpredictable behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214500 91177308-0d34-0410-b5e6-96231b3b80d8